Výsledky vyhledávání - "U. Vollenbruch"

A 6ps resolution pulse shrinking Time-to-Digital Converter as phase detector in multi-mode transceiver

Autor: Zdravko Boos, T. Mayer, Robert Weigel, Y. Liu, Yangjian Chen, Linus Maurer, Christian Wicpalek, U. Vollenbruch

Publikováno v: 2008 IEEE Radio and Wireless Symposium.

This paper presents a new phase detector in an all digital phase locked loop which converts the phase difference between one reference clock edge and one divided oscillator edge into a digital word. This digital word can be converted into a digital r

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::4ca06171c23428663d95b2a55016efe1
https://doi.org/10.1109/rws.2008.4463454

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Multi-stage pulse shrinking time-to-digital converter for time interval measurements

Autor: Y. Liu, Christian Wicpalek, U. Vollenbruch, Z. Boos, Robert Weigel, Yangjian Chen, Linus Maurer

Publikováno v: 2007 European Microwave Integrated Circuit Conference.

This paper presents a new structure of pulse shrinking time-to-digital converter (TDC) with 20 ps resolution which is implemented in Infineon 0.13 mum CMOS technology. The new interpolating multi-stage TDC with feedback loop and high speed counter ac

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::33f3024957d7d5d95c7b3d9e9603a463
https://doi.org/10.1109/emicc.2007.4412700

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Analysis and Measurement of Spurious Emission and Phase Noise Performance of an RF All-Digital Phase Locked Loop using a Frequency Discriminator

Autor: Y. Liu, Andreas Springer, T. Mayer, Christian Wicpalek, U. Vollenbruch, Linus Maurer

Publikováno v: 2007 IEEE/MTT-S International Microwave Symposium.

A frequency discriminator in all-digital phase locked loops (ADPLLs) for RF-synthesis has to fulfill several tough requirements. The most important requirements are the in-band phase noise performance and knowledge about offset frequencies of the spu

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::223277e1cd7d66ee30abee7d1aa72616
https://doi.org/10.1109/mwsym.2007.380398

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Analysis of a Two-Bit Frequency Discriminator in an All Digital Phase Locked Loop for RF-Modulation and RF-Frequency Synthesis

Autor: U. Vollenbruch, Andreas Springer, T. Mayer, Christian Wicpalek, Linus Maurer

Publikováno v: 2006 European Conference on Wireless Technologies.

A key issue in pushing the digitization of phase locked loops (PLLs) for RF transmitters is the realization of proper phase/frequency detectors in the digital domain. This paper presents a simulative analysis of the properties for and requirements of

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::ff758129c2671b715f84b75be07f485f
https://doi.org/10.1109/ecwt.2006.280489

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A First Dual-Mode RF Fully Digitally Controlled Oscillator in 0.13μm CMOS

Autor: T. Pittorino, Linus Maurer, T. Mayer, V. Neubauer, Yangjian Chen, U. Vollenbruch

Publikováno v: 2006 European Microwave Conference.

The first CMOS based fully digitally controlled oscillator suitable for GSM/EDGE and UMTS transmitter is presented. Drawing an extremely low current in order to achieve the phase noise performance sufficient for both communication systems it is highl

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::b8ffef2f6a3c4eaeb09413da524b87f0
https://doi.org/10.1109/eumc.2006.281204

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A 1 GHz ~~ Noise Shaper for All Digital PLLs with Multiband UMTS Modulation Capability

Autor: T. Mayer, Linus Maurer, T. Pittorino, Andreas Springer, V. Neubauer, U. Vollenbruch

Publikováno v: IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.

Fully digital phase locked loops (PLLs) for wideband phase modulation set tough requirements on the digitally controlled oscillator (DCO). The frequency step size should be small while the linear tuning range should be very large. To find a solution

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::67278fe42440cc6bf91344000edd2fdb
https://doi.org/10.1109/rfic.2006.1651189

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Requirements for Time-to-Digital Converters in the context of digital-PLL based Frequency Synthesis and GSM Modulation

Autor: Linus Maurer, T. Bauernfeind, T. Pittorino, T. Mayer, V. Neubauer, U. Vollenbruch, Y. Liu

Publikováno v: 2006 IEEE MTT-S International Microwave Symposium Digest.

A key issue in proceeding the digitization of Phase-Locked Loops (PLLs) is the realization of proper phase detectors in the digital domain. This paper presents simulative analysis of the properties and requirements for Time-to-Digital Converters (TDC

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::41965243a8e4f95f97337caafae73af4
https://doi.org/10.1109/mwsym.2006.249748

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Analysis of spurious emission and in-band phase noise of an all digital phase locked loop for RF synthesis using a frequency discriminator

Autor: U. Vollenbruch, Christian Wicpalek, Linus Maurer, Andreas Springer, T. Mayer, T. Pittorino

Publikováno v: Scopus-Elsevier
ISCAS

In almost every wireless RF application, a phase locked loop (PLL) is required. Digital signal processing especially for PLLs in CMOS technology is increasingly used instead of conventional analog processing to improve reliability, to reduce power co

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5645e956c8a83797fb3018e4d25a6395
http://www.scopus.com/inward/record.url?eid=2-s2.0-34548828269&partnerID=MN8TOARS

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