Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Tzyy-Jang Tseng"'
Autor:
Tzu-Nien Lee, John-H Lau, Cheng-Ta Ko, Tim Xia, Eagle Lin, Kai-Ming Yang, Puru-Bruce Lin, Chia-Yu Peng, Leo Chang, Jia-Shiang Chen, Yi-Hsiu Fang, Li-Yueh Liao, Edward Charn, Jason Wang, Tzyy-Jang Tseng
Publikováno v:
Materials, Vol 15, Iss 7, p 2396 (2022)
In this study, the Df (dissipation factor or loss tangent) and Dk (dielectric constant or permittivity) of the low-loss dielectric material from three different vendors are measured by the Fabry–Perot open resonator (FPOR) technique. Emphasis is pl
Externí odkaz:
https://doaj.org/article/a7325ed4b3bb49e9871dd6caee5ba862
Autor:
Channing Cheng-Lin Yang, John H Lau, Gary Chang-Fu Chen, Jones Yu-Cheng Huang, Andy Peng, Hsing-Ning Liu, YH Chen, Tzyy-Jang Tseng
Publikováno v:
IMAPSource Proceedings. 2022
The design, materials, process, and fabrication of a hybrid substrate for the heterogeneous integration of chips with 50μm-pitch (minimum) by fan-out chip-last panel-level packaging are presented. The hybrid substrate consists of a fine metal linewi
Autor:
Tony Chia-Yu Peng, John H. Lau, Cheng-Ta Ko, Paul Lee, Eagle Lin, Kai-Ming Yang, Bruce Puru Lin, Tim Xia, Leo Chang, Hsing-Ning Liu, Curry Lin, Tzu Nien Lee, Jason Wong, Mike Ma, Tzyy-Jang Tseng
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 12:469-478
Autor:
Chia-Yu Peng, John H Lau, Cheng-Ta Ko, Paul Lee, Eagle Lin, Kai-Ming Yang, Puru Bruce Lin, Tim Xia, Leo Chang, Ning Liu, Curry Lin, Tzu Nien Lee, Jason Wang, Mike Ma, Tzyy-Jang Tseng
Publikováno v:
International Symposium on Microelectronics. 2021:000217-000223
In this study, a high-density organic hybrid substrate for chiplets heterogeneous integration is investigated. Emphasis is placed on the design, materials, process, fabrication, and characterization of the hybrid substrate with an interconnect-layer.
Autor:
Ricky Tsun-Sheng Chou, John H Lau, Gary Chang-Fu Chen, Jones Yu-Cheng Huang, Channing Cheng-Lin Yang, Hsing-Ning Liu, Tzyy-Jang Tseng
Publikováno v:
International Symposium on Microelectronics. 2021:000124-000129
In this study, the reliability of chiplets heterogeneous integration on a 2.3D hybrid substrate using solder joint and underfill is investigated. Emphasis is placed on the thermal cycling test and drop test of the structure. The test results are plot
Autor:
Hsing-Ning Liu, Channing Cheng-Lin Yang, John H. Lau, Gary Chang-Fu Chen, Ricky Tsun-Sheng Chou, Jones Yu-Cheng Huang, Tzyy-Jang Tseng
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 11:1301-1309
The panel-level redistribution-layer (RDL)-first fan-out packaging for hybrid substrate is studied. Emphasis is placed on the process, materials, design, and fabrication of: 1) heterogeneous integration of one large chip and one small chip with 50- $
Autor:
Gary Chang-Fu Chen, John H Lau, Channing Cheng-Lin Yang, Jones Yu-Cheng Huang, Andy Yan-Jia Peng, Hsing-Ning Liu, Tzyy-Jang Tseng, Ming Li
Publikováno v:
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).
Autor:
Ting-Yang Yu, Han-Wen Hu, Yu-Hua Chen, Kuan-Neng Chen, Tzu-Chieh Chou, Cheng-Ta Ko, Tzyy-Jang Tseng, Yu-Tao Yang, Jian-Chen Li, Kai-Ming Yang, Yu-Wei Liu
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 10:1296-1303
With the advantage of high surface-roughness tolerance, the pillar–concave Cu–Cu direct bonding without chemical-mechanical planarization (CMP) is investigated in detail, including the mechanism of thermal compensation, analysis of roughness, bon
Autor:
Tim Xia, Cheng-Ta Ko, David Cheng, Kai-Ming Yang, John H. Lau, Leo Chang, Tzyy-Jang Tseng, Eagle Lin, Tony Chia-Yu Peng, Hsing Ning Liu, Puru Bruce Lin
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 10:1110-1124
In this study, a very high-throughput and low-cost packaging method for fabricating the fan-in chip-scale package is presented. Emphasis is placed on the utilization of the existing printed circuit board (PCB) panel carriers and the corresponding PCB
Autor:
Patrick Po-Chun Huang, John H. Lau, Chia-Yu Peng, Puru Bruce Lin, Jean-Jou Chen, Leo Chang, Hsing-Ning Liu, Eagle Lin, Cheng-Ta Ko, Tzyy-Jang Tseng, Tim Xia, Kai-Ming Yang
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 10:1125-1137
In this article, the fan-out chip-last panel-level packaging for heterogeneous integration is investigated. Emphasis is placed on the design, materials, process, fabrication, and simulation of thermomechanical reliability of a heterogeneous integrati