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Autor:
Arkadii V. Samoilov, Peter McNally, Tie Wang, Joy T. Jones, Nicole D. Kerness, Kiyoko Ikeuchi, Joseph P. Ellul, Stanley Barnett, Khanh Tran, Tyler Parent, Anu Srivastava, Tiao Zhou
Publikováno v:
2013 IEEE International Electron Devices Meeting.
We illustrate capabilities of 3D integration for analog applications through both wafer-level and packaging technologies. Examples of wafer-level 3D integration include integrated capacitors and optical sensors. Integrated Si capacitors demonstrate t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dce13de344c6eaed4faa593ae0334ece
https://doi.org/10.1109/iedm.2013.6724688
https://doi.org/10.1109/iedm.2013.6724688
