Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Tushar Mandrekar"'
Autor:
M. Cogorno, S. C. Kung, Tushar Mandrekar, Balasubramanian S. Pranatharthi Haran, Mary Breton, Hemanth Jagannathan, Jingyun Zhang, James Chingwei Li, Benjamin Colombeau, Huimei Zhou, Shogo Mochizuki, Koji Watanabe, Nicolas Loubet, Sanjay Natarajan, M. Stolfi, P. Chen
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
In this paper, horizontal gate-all-around (hGAA) devices with a SiGe cladded nanosheet (NS) channel have been explored for their potential benefits of Vt modulation and improved NBTI. The SiGe cladded NS channel was formed through trimming of the Si
Autor:
Manish Hemkar, Errol Sanchez, Tushar Mandrekar, Mohammad Chowdhury, Zuoming Zhu, Chris Olsen, Manoj Vellaikal, Schubert Chu
Publikováno v:
ECS Meeting Abstracts. :1053-1053
Device scaling and new applications in nanoelectronics present increasing challenges to epitaxy. Reducing thermal budgets, compatibility with novel materials, increasing topology and higher device density require new strategies for both the epitaxial
Autor:
Melody Agustin, Tushar Mandrekar, Christopher Lazik, Victor Ku, G. Conti, Robert Liang, Kishore Lavu, Chorng-Ping Chang, Steven Hung, Miao Jin, Bo Zheng, Rongjun Wang, Naomi Yoshida, Dave Liu, Xianmin Tang, Khaled Ahmed, Srinivas Gandikota, Hao Chen, Osbert Chan
Publikováno v:
ECS Transactions. 13:143-150
RF-PVD was investigated as a metal oxide cap deposition process to tune the effective work function in a gate first flow for high-k metal gate stacks. Samples with an aluminum oxide cap layer showed a large flat band voltage shift at minimal equivale
Autor:
Kavita Shah, Reza Arghavani, Mihaela Balseanu, R. Schreutelkamp, Jorge A. Kittl, Steven Demuynck, S. Gandikota, P. Boelen, A.J. Gelatos, A. Khandelwal, S. Felch, Li-Qun Xia, Ching-Ya Wang, Jianxin Lei, A.M. Noori, Scott E. Thompson, Peter Verheyen, Tushar Mandrekar, A. Cockburn, Anne Lauwers, Wen-Chin Lee
Publikováno v:
IEEE Transactions on Electron Devices. 55:1259-1264
Manufacturable processes to reduce both channel and external resistances (RExt) in CMOS devices are described. Simulations show that RExt will become equivalent to strained Si channel resistance near the 32-nm logic node. Tensile stress in plasma-enh
Autor:
Bencherki Mebarki, O. Chamirian, M. A. Pawlak, Tushar Mandrekar, Karen Maex, Muriel de Potter, Anne Lauwers, Xavier Pages, Jorge A. Kittl, Toon Raymakers, Richard Lindsay, Mark Van Dal
Publikováno v:
Materials Science and Engineering: B. :29-41
Material issues that impact the applicability of Ni based silicides to CMOS flows were studied, including the excessive silicidation of narrow features, the growth kinetics of Ni 2 Si and NiSi on single-crystalline and poly-crystalline silicon and th
Publikováno v:
Microelectronic Engineering. 70:358-362
Passivated single damascene copper SiO2 damascene lines were evaluated in combination with TiSiN and Ta(N)/Ta diffusion barriers. Leakage current, breakdown and time-dependent dielectric breakdown properties were investigated on a wafer level basis f
Autor:
O. Richard, E. Beach, Karen Maex, Steven J. Rozeveld, S. Guggilla, Bencherki Mebarki, J. Waeterloos, Francesca Iacopi, Zs. Tőkei, Tushar Mandrekar
Publikováno v:
Microelectronic Engineering. 70:352-357
Barrier integrity of Ta-films deposited using the enhanced coverage by re-sputtering (EnCoRe) barrier was investigated on untreated surfaces of blanket porous SiLK semiconductor dielectric (developmental version 7, hereinafter v7). Barrier integrity
Autor:
Bencherki Mebarki, Aunchan Wang, Jingmei Liang, Tushar Mandrekar, Hao D. Chen, Ping Xu, Pokhui Blanko, Yongmei Chen, Christopher S. Ngai, Mehul Naik, Xiaolin Chen, Kedar Sapre, Christopher Dennis Bencher
Publikováno v:
SPIE Proceedings.
We successfully demonstrate a new approach to achieve 15nm half pitch with a spacer based selfaligned triple patterning (SATP). This new concept has a single spacer deposition and etch step to achieve 15nm half pitch using immersion lithography. Curr
Autor:
Sanjay Mehta, J. Hua, Manuel A. Hernandez, V. Ton, Tushar Mandrekar, Ajay Bhatnagar, Shankar Venkataraman
Publikováno v:
2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
Applicability of SACVD for doping of 3-D structures was assessed on both flat substrates as well as patterned structures focusing on the optimization of dopant profile within the SACVD film. Boron and phosphorous doped ultra-shallow junctions of 6 an
Autor:
Sywert Brongersma, P. Boelen, J. Van Olmen, J. Gelatos, S. List, Henny Volders, Zsolt Tokei, Ivan Ciofi, L. Carbonell, Eddy Kunnen, A. Khandelwal, Tushar Mandrekar, Nancy Heylen
Publikováno v:
2007 IEEE International Interconnect Technology Conferencee.
Two of the most important questions concerning the future of interconnects are 1) how scalable is the damascene process to extremely narrow trenches and 2) what is the resistivity of Cu in these trenches? We attempt to answer both these questions thr