Zobrazeno 1 - 10
of 30
pro vyhledávání: '"Tsutomu Murakawa"'
Autor:
Takeya Hirose, Yuki Okamoto, Yusuke Komura, Toshiki Mizuguchi, Toshihiko Saito, Minato Ito, Kiyotaka Kimura, Hiroki Inoue, Tatsuya Onuki, Yoshinori Ando, Hiromi Sawai, Tsutomu Murakawa, Hitoshi Kunitake, Hajime Kimura, Takanori Matsuzaki, Makoto Ikeda, Shunpei Yamazaki
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 12, Pp 236-242 (2024)
We present a three-dimensional (3D) DRAM prototype, which is formed using oxide semiconductor FETs (OSFETs) monolithically stacked on a Si CMOS. The OSFETs are composed of a one-layer planar FET and two-layer vertical FETs (VFETs). The 1T1C memory ce
Externí odkaz:
https://doaj.org/article/936c403535f14b428f2a5a71bfb5a0ef
Autor:
Naomi Yazaki, Ryosuke Motoyoshi, Shiyu Numata, Kazuaki Ohshima, Yuji Egi, Fumito Isaka, Toshikazu Ohno, Sachiaki Tezuka, Toshiki Hamada, Kazuma Furutani, Kazuki Tsuda, Takanori Matsuzaki, Tatsuya Onuki, Tsutomu Murakawa, Hitoshi Kunitake, Masaharu Kobayashi, Shunpei Yamazaki
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 11, Pp 467-472 (2023)
Aiming to reduce the area of a ferroelectric random access memory (FeRAM), we fabricated an FeRAM having a 1T1C configuration by using a ${c}$ -axis aligned crystalline In-Ga-Zn-O field-effect transistor, which we call OSFET, with a high breakdown vo
Externí odkaz:
https://doaj.org/article/130a499579cf486f97ff60e88658e798
Autor:
Ryota Hodo, Satoru Saito, Kentaro Sugaya, Yoshikazu Hiura, Takahiro Fujie, Shinya Sasagawa, Tsutomu Murakawa, Hitoshi Kunitake, Shunpei Yamazaki
Publikováno v:
SID Symposium Digest of Technical Papers. 53:310-313
Autor:
Munehiro Kozuma, Yuki Okamoto, Minato Ito, Hiroki Inoue, Toshihiko Saito, Yusuke Komura, Shoki Miyata, Kouhei Toyotaka, Takanori Matsuzaki, Tatsuya Onuki, Hidetomo Kobayashi, Kentaro Sugaya, Takahiro Fujie, Yutaka Okazaki, Ryota Hodo, Yuichi Yanagisawa, Masahiro Wakuda, Tsutomu Murakawa, Shinya Sasagawa, Hitoshi Kunitake, Daiki Nakamura, Takaaki Nagata, Shinya Fukuzaki, Tomoya Aoyama, Hajime Kimura, Shih-Ci Yen, Chuan-Hua Chang, Wen-Hsiang Hsieh, Hiroshi Yoshida, Min-Cheng Chen, Ming-Han Liao, Shou-Zen Chang, Shunpei Yamazaki
Publikováno v:
SID Symposium Digest of Technical Papers. 53:384-387
Autor:
Hitoshi Kunitake, Kazuki Tsuda, Satoru Saito, Naoki Okuno, Masahiro Takahashi, Masashi Oota, Toshiki Hamada, Yoshinobu Asami, Hiromi Sawai, Motomu Kurata, Toshiya Endo, Kentaro Sugaya, Masaru Nakano, Ryota Hodo, Shinya Sasagawa, Toshikazu Ono, Tsutomu Murakawa, Masahiro Wakuda, Shunpei Yamazaki
Hardware is required to be further miniaturized aiming at advancement of the Internet of things and artificial intelligence. Widely used Si transistors, which have achieved miniaturization on the order of 10 nm, are apparently difficult to further mi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::935ee88dfc25c34c9e7610eba1fb7c13
https://doi.org/10.21203/rs.3.rs-1215280/v1
https://doi.org/10.21203/rs.3.rs-1215280/v1
Autor:
Shunpei Yamazaki, Takahiko Ishizu, Atsuo Isobe, Yoshinori Ando, Masahiro Fujita, Masashi Fujita, Kiyoshi Kato, Kazuma Furutani, Tsutomu Murakawa, Tomoaki Atsumi, Yuto Yakubo
Publikováno v:
IEEE Solid-State Circuits Letters. 2:293-296
This letter presents a microcontroller unit (MCU) that employs a $c$ -axis aligned crystalline indium–gallium–zinc oxide semiconductor FET (CAAC-IGZO FET) with an extremely low off-state current below the zepto-ampere (10−21 A) level. This MCU
Autor:
Haruyuki Baba, Tomoaki Atsumi, Tatsuya Onuki, Hitoshi Kunitake, Kazuaki Ohshima, Shunpei Yamazaki, Hajime Kimura, Kiyoshi Kato, Satoru Ohshita, Masashi Oota, Tsutomu Murakawa, Daigo Shimada
Publikováno v:
International Journal of Ceramic Engineering & Science. 1:6-20
Autor:
Kazuma Furutani, Yuto Yakubo, Shunpei Yamazaki, Tatsuya Onuki, Keita Sato, Yoshinori Ando, Saito Seiya, Tsutomu Murakawa, Eri Yamamoto, Takanori Matsuzaki, Kiyoshi Kato, Tomoaki Atsumi
Publikováno v:
ECS Transactions. 90:139-146
This paper reports the validation of our prototyped memory operating with 1.8-V power supply and low stand-by power, using 60-nm c-axis-aligned crystalline In-Ga-Zn oxide (CAAC-IGZO) field-effect transistors (FETs). Its operation evaluation verified
Autor:
Satoru Ohshita, N. Matsumoto, Hitoshi Kunitake, T. Nakura, Tomoaki Atsumi, Kazuki Tsuda, S. Yamazaki, K. Kato, Y. Okazaki, Tsutomu Murakawa, Kazuaki Ohshima, Tatsuki Koshida
Publikováno v:
Extended Abstracts of the 2019 International Conference on Solid State Devices and Materials.
Autor:
Shunpei Yamazaki, Yoshinori Ando, Yuto Yakubo, Atsuo Isobe, Masahiro Fujita, Kiyoshi Kato, Tsutomu Murakawa, Kazuma Furutani, Takahiko Ishizu, Masashi Fujita, Tomoaki Atsumi
Publikováno v:
VLSI Circuits
We have prototyped a microcontroller (MCU) that employs crystalline In–Ga–Zn oxide transistors having an extremely low off current below 10−21 A. The IGZO-based MCU can retain data during power gating in both of its processing unit and memory,