Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Tseng Chien-Hsien"'
Autor:
Chi-Hsien Chung, Chiang Wei-Chieh, Kuo-Yu Chou, Tzu-Hsiang Chen, Tseng Chien-Hsien, Tung-Ting Wu, Takahashi Seiji, Chin-Chia Kuo, Chuan-Joung Wang, Huang Yimin, Dun-Nien Yaung, Chuang Chun-Hao, King Liao, Tung-Hsiung Tseng, Fu-Sheng Guo, Jhy-Jyi Sze, Hsu Wei-Cheng, Chou Keng-Yu
Publikováno v:
Sensors, Vol 17, Iss 12, p 2816 (2017)
Sensors; Volume 17; Issue 12; Pages: 2816
Sensors (Basel, Switzerland)
Sensors; Volume 17; Issue 12; Pages: 2816
Sensors (Basel, Switzerland)
A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ac67032e3f5a8aeb975f5a08156255f4
https://www.mdpi.com/1424-8220/17/12/2816
https://www.mdpi.com/1424-8220/17/12/2816
Akademický článek
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Publikováno v:
IEEE Electron Device Letters. 22:71-73
A nonsilicide source/drain pixel is proposed for high performance 0.25-/spl mu/m CMOS image sensor. By using organic material spin coat and etch back, silicide is only formed on poly gate which can be used as interconnection, not for source/drain reg
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8ca7cc7dfbac766d237ab67ce2b9a8e6
https://doi.org/10.1109/55.902835
https://doi.org/10.1109/55.902835
Autor:
Hun-Jan Tao, H. C. Lin, Huan-Just Lin, Lee Chia-Fu, P.C. Yen, C.H. Huang, Yuan-Hung Chiu, W.S. Huang, C. C. Wu, King-Yuen Wong, Chun Chen, Stock Chang, Wang Shiang-Bau, Li-Shiun Chen, S.W. Chuang, Po-Kang Wang, Ming-Jie Huang, X.F. Yu, S.Y. Ku, Chien-Chao Huang, M.L. Cheng, Yung-Huei Lee, K. F. Yu, T.H. Li, C.M. Wu, Y. C. Peng, C.H. Tsai, Y.C. Lin, Tsz-Mei Kwok, Yi-Chun Huang, P.S. Lim, T.C. Gan, Tzong-Lin Wu, K.Y. Hsu, L.Y. Yang, S.S. Lin, L.W. Weng, T.H. Hsieh, F.K. Yang, C.T. Chan, Eric Ou-Yang, P.C. Hsieh, Derek Lin, S.B. Wang, Ming-Jer Chen, A. Keshavarzi, Chih-Yuan Lu, Chuan-Ping Hou, L.T. Lin, J.L. Yang, Yuh-Jier Mii, Chien-Chang Su, J.H. Chen, Hsieh Ching-Hua, Huan-Neng Chen, Y.W. Tseng, C. P. Lin, Chou Chun-Hao, A.S. Chang, Tseng Chien-Hsien, S.H. Liao, Tsung-Lin Lee, M. Cao
Publikováno v:
2010 International Electron Devices Meeting.
A high performance 22/20nm CMOS bulk FinFET achieves the best in-class N/P I on values of 1200/1100 µA/µm for I off =100nA/µm at 1V. Excellent device electrostatic control is demonstrated for gate length (L gate ) down to 20nm. Dual-Epitaxy and mu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b4c6b433e020bd0d422f4c784d225937
https://doi.org/10.1109/iedm.2010.5703430
https://doi.org/10.1109/iedm.2010.5703430
Autor:
P.S. Chou, Shou-Gwo Wuu, T.H. Hsu, K.Y. Chou, F. L. Hsueh, H.Y. Tu, Yeur-Luen Tu, Luan Tran, Tseng Chien-Hsien, Y.P. Chao, R.S. Hsiao, Chi-Chuan Wang, B.C. Hseih, Chia-Shiung Tsai, S. Takahashi, R.J. Lin
Publikováno v:
2010 International Electron Devices Meeting.
This paper presents process breakthroughs that enable a BSI 0.9µm pixel formation and its performance. The technology was developed using 300mm bulk silicon starting wafers with the state-of-the-art tool set for BSI sensor processing. This is the fi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b979265ac21d450461dca9cc8b1012d6
https://doi.org/10.1109/iedm.2010.5703358
https://doi.org/10.1109/iedm.2010.5703358
Autor:
Dun-Nian Yaung, Hung-Jen Hsu, Tze-Hsuan Hsu, Shou-Gwo Wuu, Jeng-Shyan Lin, Chin-Hsin Lo, C.S. Wang, C.H. Yu, Tseng Chien-Hsien, Ho-Ching Chien
Publikováno v:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
For pixel crosstalk improvement, modified logic technology with thin epi wafer thickness, thin backend process thickness and air gap guard ring technology, pixel size can be further scaled down to less than 2.8 /spl mu/m /spl times/ 2.8 /spl mu/m and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d862400c312ece10a3b23e2bb3e276a4
https://doi.org/10.1109/iedm.2004.1419356
https://doi.org/10.1109/iedm.2004.1419356
Autor:
Tseng Chien-Hsien, Chin-Hsin Lo, Shou-Gwo Wuu, C.H. Yu, Ho-Ching Chien, Chia-Shiung Tsai, Tzu-Hsuan Hsu, Jieh-Jang Chen, Jeng-Shyan Lin, Dun-Nian Yaung, C.S. Wang
Publikováno v:
IEEE International Electron Devices Meeting 2003.
An air-gap guard ring around the pixel sensor, to improve pixel sensitivity and crosstalk, in 0.18 /spl mu/m CMOS image sensor technology has been successfully developed. By using the RI (refractive index) difference between the air gap (RI/spl sim/1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ecbfd7a30137ee2bab283a6ddbfc6aa
https://doi.org/10.1109/iedm.2003.1269308
https://doi.org/10.1109/iedm.2003.1269308
Autor:
Yu-Kung Hsiao, C.S. Wang, Shou-Gwo Wuu, Tseng Chien-Hsien, Chin-Kung Chang, Ho-Ching Chien, Dun-Nian Yaung, Jeng-Shyan Lin
Publikováno v:
Digest. International Electron Devices Meeting.
A high performance 0.18 /spl mu/m CMOS image sensor technology is reported in this paper. It is modified from a generic logic technology. A 64/spl times/64 3T pixel array of various pixel size from 2.8 /spl mu/m to 4.0 /spl mu/m is used to study the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4c94b4ac78678bc16940c02e1b92fc4d
https://doi.org/10.1109/iedm.2002.1175962
https://doi.org/10.1109/iedm.2002.1175962
Autor:
Tseng Chien-Hsien, Shou-Gwo Wuu, Ho-Ching Chien, Dun-Nian Yaung, C.S. Wang, Yu-Kung Hsaio, Chin-Kung Chang
Publikováno v:
International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).
A high performance 0.18 um CMOS image sensor technology has been successfully developed and fully characterized. 3T active pixel sensor (APS) with non-silicide source/drain process is provided to reduce dark current and increase photoresponse. By opt
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e63badb44d32320ab3b5fdddb736db85
https://doi.org/10.1109/iedm.2001.979567
https://doi.org/10.1109/iedm.2001.979567
Autor:
Chin-Kung Chang, Yean-Kuen Hsiao, Shou-Gwo Wuu, Tseng Chien-Hsien, B.J. Chang, Dun-Nian Yaung, Ho-Ching Chien, C.S. Wang
Publikováno v:
International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).
A high performance 0.25 um CMOS image sensor technology has been developed to overcome device scaling and process issues. Non-silicide source/drain pixel (3 transistors, 3.3 um/spl times/3.3 um, fill factor: 28%) is provided to reduce dark current an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2659813557f506094792cde2d5c1ede
https://doi.org/10.1109/iedm.2000.904416
https://doi.org/10.1109/iedm.2000.904416