Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Tractament vectorial"'
Autor:
Francesco Minervini, Oscar Palomar, Osman Unsal, Enrico Reggiani, Josue Quiroga, Joan Marimon, Carlos Rojas, Roger Figueras, Abraham Ruiz, Alberto Gonzalez, Jonnatan Mendoza, Ivan Vargas, César Hernandez, Joan Cabre, Lina Khoirunisya, Mustapha Bouhali, Julian Pavon, Francesc Moll, Mauro Olivieri, Mario Kovac, Mate Kovac, Leon Dragic, Mateo Valero, Adrian Cristal
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 20:1-25
The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized hardware in processor cores for the High Performance C
Novel architectures leveraging long and variable vector lengths like the NEC SX-Aurora or the vector extension of RISCV are appearing as promising solutions on the supercomputing market. These architectures often require re-coding of scientific kerne
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ac361e40cb5bfef90a45e594701cc8d2
https://hdl.handle.net/2117/376024
https://hdl.handle.net/2117/376024
Autor:
Cristobal Ramirez Lazo, Enrico Reggiani, Carlos Rojas Morales, Roger Figueras Bague, Luis A. Villa Vargas, Marco A. Ramirez Salinas, Mateo Valero Cortes, Osman Sabri Unsal, Adrian Cristal
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Modern scientific applications are getting more diverse, and the vector lengths in those applications vary widely. Contemporary Vector Processors (VPs) are designed either for short vector lengths, e.g., Fujitsu A64FX with 512-bit ARM SVE vector supp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::61ae05aa8bd5a43262b6dc365777a7b9
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Euro-Par 2021: Parallel Processing Workshops ISBN: 9783031061554
Universitat Politècnica de Catalunya (UPC)
Euro-Par 2021: Parallel Processing Workshops ISBN: 9783031061554
Novel architectures leveraging long and variable vector lengths like the NEC SX-Aurora or the vector extension of RISCV are appearing as promising solutions on the supercomputing market. These architectures often require re-coding of scientific kerne
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::577323ee803de45c369f8ff26da3764a
http://hdl.handle.net/2117/373905
http://hdl.handle.net/2117/373905
Autor:
Alberto Ros, Marc Casas, Thibaud Balem, Juan M. Cebrian, Miquel Moreto, Adrian Barredo, Alexandra Jimborean
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
DIGITUM. Depósito Digital Institucional de la Universidad de Murcia
instname
IEEE Transactions on Parallel and Distributed Systems (TPDS)
Universitat Politècnica de Catalunya (UPC)
DIGITUM. Depósito Digital Institucional de la Universidad de Murcia
instname
IEEE Transactions on Parallel and Distributed Systems (TPDS)
Vector processors (e.g., SIMD or GPUs) are ubiquitous in high performance systems. All the supercomputers in the world exploit data-level parallelism (DLP), for example by using single instructions to operate over several data elements. Improving vec