Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Toshio Ohkido"'
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 60:1979-1990
This paper describes a digitally calibrated 7-bit, 1.4 GS/s flash analog-to-digital converter (ADC) implemented in 45-nm CMOS. The proposed offset drift suppression techniques for dynamic comparator and preamplifier make the ADC robust against enviro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1c80a09aeabb7de2f680f1792433a6eb
https://doi.org/10.1109/tcsi.2013.2256236
https://doi.org/10.1109/tcsi.2013.2256236
Autor:
Norihito Kato, Toshio Ohkido, Yuji Nakajima, Tetsuya Matsumoto, Akemi Sakaguchi, Michio Yotsuyanagi
Publikováno v:
IEEE Journal of Solid-State Circuits. 45:707-718
We have developed a 6b 2.7 GS/s folding ADC with on-chip background self-calibration in 90 nm CMOS technology. The ADC achieves high-speed operation of 2.7 GS/s at low power consumption of 50 mW from a 1.0 V power supply and the figure of merit (FOM)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::681ca9cd623ee52dfc897fde5177f7f5
https://doi.org/10.1109/jssc.2010.2042249
https://doi.org/10.1109/jssc.2010.2042249
Autor:
Norihito Kato, Hiroko Masuda, Kenji Shimomaki, Akemi Sakaguchi, Michio Yotsuyanagi, Takahiro Miki, Toshio Ohkido, Yuji Nakajima, Chikahiro Shiroma
Publikováno v:
CICC
A 7b 1.4 GS/s flash ADC is developed in 45 nm CMOS. This is the first paper of an ADC with offset drift suppression techniques for dynamic comparator and preamplifier. These techniques make the ADC robust against environmental variation. As a result,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a61b2d8fe35c2b522987fc216cdd1c7
https://doi.org/10.1109/cicc.2012.6330608
https://doi.org/10.1109/cicc.2012.6330608