Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Toshio Enami"'
Publikováno v:
Transactions of The Japan Institute of Electronics Packaging. 8:127-137
Publikováno v:
2016 International Conference on Electronics Packaging (ICEP).
Relationship between the stress of ICs and package warpage caused by flip-chip bonding is evaluated using piezoresistor chip and is measured by Moire measurement method. The die size is 9×9 mm2 with 200µm and 550µm in thickness. After non-conducti
Autor:
Mori Takashi, Masayuki Kawase, Nobuhiro Imaizumi, Ryoji Tanimoto, Takeda Kohei, Toshio Enami, Taiji Sakai, Masataka Mizukoshi
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2012:001701-001730
We have developed Cu-Cu/adhesives hybrid bonding technique by using collective cutting of Cu bumps and adhesives in order to achieve high density 3D-SIC. It is considered that progression of fine pitch interconnection leads to lower height of bonding
Publikováno v:
2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC).
The stress of integrated circuits caused by flip-chip bonding (FCB) is evaluated using piezo-sensor embedded test element group (TEG) chips. After non-conductive film (NCF) coating, the TEG chips are connected to the organic substrate and silicon int
Publikováno v:
2015 International Conference on Electronic Packaging and iMAPS All Asia Conference (ICEP-IAAC).
The stress of ICs caused by flip-chip bonding process is evaluated using piezo-resistor embedded test element group (TEG) chips. The TEG size is 9 × 9 mm2 with 550 µm in thickness. After non-conductive film (NCF) coating, the TEG chip is connected
Autor:
Hong Qi Sun, XiangFeng Wang, Tomoyuki Ando, Takeda Kohei, Toshio Enami, Chee Guan Koh, Vempati Srinivasa Rao, Tai Chong Chai, Sharon Pei Siang Lim, Li Yan Siow
Publikováno v:
2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).
The use of flip-chip technology in packaging interconnects is becoming more important due to its better electrical performance, smaller form factor packages, and higher interconnect density than wire bonded packages. Flip-chip soldering has been the
Publikováno v:
Precision Engineering. 21:65-71
This paper deals with a new prototyping method called dot-matrix electrical discharge machining (EDM) with scanning motion. The machining process by the dot-matrix method is similar to printing motion with a dot-impact printer. This method can be app
Publikováno v:
Journal of the Japan Society for Precision Engineering. 63:254-258
Publikováno v:
CIRP Annals. 46:139-142
The quality of the surface machined by electrical discharge machining (EDM) depends on the degree of discharge dispersion. In this paper a dot-matrix EDM with scanning motion is proposed in order to realize rapid prototyping by EDM and to control the
Publikováno v:
Transactions of The Japan Institute of Electronics Packaging. 9:E16-004