Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Toshinori Koyama"'
Autor:
Toshinori Koyama, Manabu Nakamura, Yuji Kunimoto, Atsunori Kajiki, Masayuki Mizuno, Kosuke Tsukamoto, Shinji Nakazawa
Publikováno v:
International Symposium on Microelectronics. 2019:000381-000386
Heterogeneous packaging is one of the advanced technologies. Especially for high-end applications such as data center server, HPC and Artificial-Intelligence (AI), High-Bandwidth Memory (HBM) integration is a key and strongly required. As we know, th
Publikováno v:
Journal of The Japan Institute of Electronics Packaging. 22:367-373
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
Recently, 2.5D package structure such as using silicon interposer is used for high end sever and HPC (High Performance Computing) with high density connection between logic device and memory device. We are developing high density organic package call
Publikováno v:
International Symposium on Microelectronics. 2014:000382-000387
This paper describes the development of a Glass-Interposer (Glass-IP) with 40um-pitch Cu micro- bumps. It features fine Cu wiring on the front side, Through-hole Glass-Vias (TGV), and a Re-distribution layer (RDL) on back side. After first explaining
Autor:
Shoji Watanabe, Zafer Kutlu, Takashi Kurihara, Kiyoshi Oi, Yuji Kunimoto, Satoshi Otake, Lavanya Aryasomayajula, Masato Tanaka, Toshinori Koyama, Noriyoshi Shimizu
Publikováno v:
2014 IEEE 64th Electronic Components and Technology Conference (ECTC).
2.5D packaging technology utilizing silicon interposers is being developed and used for high-performance applications as the demand for miniaturization and higher density continues to increase. Silicon interposers enable very high density interconnec
Autor:
Naoyuki Koizumi, Wataru Kaneda, Noriyoshi Shimizu, Hiromu Arisaka, Satoshi Sunohara, Toshinori Koyama, Akio Rokugawa
Publikováno v:
International Symposium on Microelectronics. 2013:000414-000414
In recent years, it has become apparent that the conventional FC-BGA (Flip Chip Ball Grid Array) substrate manufacturing method (Electroless Cu plating, Desmear, Laser Drilling processing) is reaching its limits for finer wiring dimensions and narrow