Zobrazeno 1 - 10
of 69
pro vyhledávání: '"Toshihide Kikkawa"'
Publikováno v:
physica status solidi (a). 211:779-783
A method for identifying the critical traps for the dynamic behavior of gallium nitride high electron mobility transistors (GaN-HEMTs) is described. This method provides information on where the critical traps are located in the horizontal direction.
Autor:
Saurabh Chowdhury, YiFeng Wu, Likun Shen, Kurt Smith, Peter Smith, Toshihide Kikkawa, John Gritters, Lee McCarthy, Rakesh Lal, Ronald Barr, Zhan Wang, Umesh Mishra, Primit Parikh, Tsutomu Hosoda, Ken Shono, Kenji Imanishi, Tsutsumo Ogino, Akitoshi Mochizuki, Kenji Kiuchi, Yoshimori Asai
Publikováno v:
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).
Manufacturing readiness of the world's first highly reliable 650V GaN HEMT is demonstrated with high process capability (CpK>1.6) for leakage and on resistance. This technology was developed in a Si-CMOS compatible 6-inch foundry and has been demonst
Autor:
Naoki Hara, Toshihiro Ohki, Kozo Makiyama, Atsushi Yamada, Toshihide Kikkawa, Kazukiyo Joshin, Kenji Imanishi, Masahito Kanamura
Publikováno v:
physica status solidi c. 7:2429-2432
This paper describes a technique to improve the drain leakage current and current collapse problems with GaN high electron mobility transistors (GaN-HEMTs) for millimeter-wave high-power and high-efficiency amplifiers with very short gate-periphery.
Publikováno v:
Materials Science Forum. :791-794
We discuss the influence of negative charging on high-rate ICP etching of SiC via-holes for GaN HEMT MMICs. There is large differential etching behavior such as etch rate, etching profile, and RIE lag between S.I.- and n-SiC substrates because of the
Publikováno v:
IEEJ Transactions on Electronics, Information and Systems. 130:929-933
We present high performance normally-off GaN MIS-HEMTs. Devices with n-GaN/i-AlN/n-GaN cap layer, recessed gate and insulated gate structure show high drain current and complete normally-off operation. A maximum drain current and threshold voltage ar
Autor:
Naoya Okamoto, Toshihide Kikkawa, Toshihiro Ohki, Kazukiyo Joshin, Kozo Makiyama, Masahito Kanamura, Kenji Imanishi, Naoki Hara
Publikováno v:
physica status solidi c. 6:1365-1368
A novel piezoelectric-induced cap structure in an AlGaN/GaN high electron mobility transistor (HEMT) was developed for enhancement-mode (E-mode) operation with high maximum drain current density (Idmax), high breakdown voltage (BVgd) and small curren
Autor:
Toshihide Kikkawa, Kazukiyo Joshin, Naoki Hara, Toshihiro Ohki, Kozo Makiyama, Masahito Kanamura, Kenji Imanishi
Publikováno v:
physica status solidi (a). 206:1135-1144
In this paper, a current status and future technologies of high-power GaN HEMTs was described. First, commercialization roadmap was shown with output power and efficiency status. Power electronics benchmark was also introduced. Reliability improvemen
Autor:
Toshihiro Ohki, Toshihide Kikkawa, Masahito Kanamura, Kozo Makiyama, Naoki Hara, Naoya Okamoto, Kazukiyo Joshin, Kenji Imanishi
Publikováno v:
physica status solidi c. 5:2037-2040
High power n-GaN/n-AlGaN/GaN metal-insulator-semi-conductor high electron mobility transistors (MIS-HEMTs) with high-k Ta2O5 dielectric layer were fabricated on a 3-inch S.I.-SiC substrate, for the first time. An n-GaN/n-AlGaN/GaN MIS-HEMTs with 400
Autor:
Kenji Imanishi, Naoki Hara, Masahito Kanamura, Toshihide Kikkawa, Toshihiro Ohki, Kozo Makiyama
Publikováno v:
physica status solidi (a). 204:2054-2058
This paper discusses the technology of state-of-the-art GaN high electron mobility transistors (GaN-HEMTs) used for millimeter-wave amplifiers. A high maximum frequency of oscillation (f max ) device with high breakdown voltage (BV gd ) was focused o
Autor:
Likun Shen, Toshihide Kikkawa, Yoshimori Asai, Kenji Imanishi, Saurabh Chowdhury, Pete Smith, Rakesh K. Lal, Tsutomu Hosoda, Ken Shono, Primit Parikh, Ronald Barr, Dixie Dunn, Lee McCarthy, Umesh K. Mishra, Kurt Smith, John Gritters, Yifeng Wu
Publikováno v:
IRPS
The reliability of 600 V GaN power switches, fabricated in a silicon CMOS foundry, has been demonstrated. JEDEC qualification of cascode packages and the long term reliability of GaN power switches has been estimated for the first and shown to be gre