Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Tomoya Kawagoe"'
Publikováno v:
Records of the 1993 IEEE International Workshop on Memory Testing.
The authors describe a new high-speed Shmoo plot algorithm for ULSI memory devices. The proposed boundary search method is 8 times faster than the conventional (linear searching) method. Using this method the evaluation time of a 64 Mbit memory is re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e31a38bdf4ca5bbc3b87c77d4aafa22d
https://doi.org/10.1109/mt.1993.263158
https://doi.org/10.1109/mt.1993.263158
Publikováno v:
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).
A shared built-in self-repair analysis scheme (Shared-BISA) for multiple embedded memory cores in the SOC is proposed to realize minimum area penalty independent of the number of embedded memory cores. A compact reconfigurable CAM array in the BISA c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::25ed027bcced58eb978ecaa61d72e778
https://doi.org/10.1109/cicc.2001.929752
https://doi.org/10.1109/cicc.2001.929752
Publikováno v:
ITC
A new practical built-in self-repair analyzer algorithm for embedded DRAMs (e-DRAM) achieves 100% detection ability of the repairable chips with 1% area penalty of the target 32 Mb embedded DRAM by 4 parallel analyzers. It works at as fast as 500 MHz
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::99173fb36eed7c66d1b4e4f8de8da5b2
https://doi.org/10.1109/test.2000.894250
https://doi.org/10.1109/test.2000.894250
Conference
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