Zobrazeno 1 - 10
of 64
pro vyhledávání: '"Tomokazu Yoneda"'
Autor:
Tomokazu Yoneda, Chia Yee Ooi, Mahshid Mojtabavi Naeini, Michiko Inoue, Sreedharan Baskara Dass
Publikováno v:
Integration. 57:108-124
Shrinking technologies to deep sub-microns has raised demands for high quality testing. However, excessive power during test application time serves as limiting factors for reliability in testing. To address these issues, we have proposed Integrated
Publikováno v:
IEICE Transactions on Information and Systems. :130-139
Publikováno v:
IEICE Transactions on Information and Systems. :2591-2599
Publikováno v:
2018 International Conference on Innovations in Science, Engineering and Technology (ICISET).
Due to outsourcing of numerous stages of IC manufacturing process in different foundries, the security risk such as hardware Trojan becomes a potential threat. This work presents a power based side-channel analysis framework, which magnifies the dete
Autor:
Yukiya Miura, Seiji Kajihara, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue, Yasuo Sato, Yuta Yamato, Satoshi Ohtake
Publikováno v:
VLSI Design and Test for Systems Dependability ISBN: 9784431565925
LSIs may degrade over time even if they are properly manufactured. The decrease of delay margin caused by the degradation increases the risk of malfunction due to noises or environmental changes as a result, and thus becomes a serious issue for syste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d183155f7261aa46f9e2c2d65643c2cb
https://doi.org/10.1007/978-4-431-56594-9_16
https://doi.org/10.1007/978-4-431-56594-9_16
Autor:
Masahiro Fujita, Koichiro Takayama, Takeshi Matsumoto, Kosuke Oshima, Satoshi Jo, Michiko Inoue, Tomokazu Yoneda, Yuta Yamato
Publikováno v:
VLSI Design and Test for Systems Dependability ISBN: 9784431565925
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2c8c6e3dba81290b9d5c4587e386ccc8
https://doi.org/10.1007/978-4-431-56594-9_11
https://doi.org/10.1007/978-4-431-56594-9_11
Publikováno v:
ATS
High detection sensitivity in the presence of process variation is a key challenge for hardware Trojan detection through side channel analysis. In this work, we present an efficient Trojan detection approach in the presence of elevated process variat
Publikováno v:
ETS
The sensitive identification and detection of hardware Trojans in ICs without a golden reference constitutes a key challenge. Traditional circuit partitioning and side-channel analysis techniques fall short of perfect sensitivity and accuracy and rel
Publikováno v:
JSTS:Journal of Semiconductor Technology and Science. 14:124-130
In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. This paper presents a scan-based on-line aging monitoring schem
Publikováno v:
ETS
Reliability of memory is crucial to overall reliability of SoCs. In our previous work, we enhanced reliability through an adaptive combination of repair and memory word correction, however, it is restricted to the identification of faulty memory word