Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Tommy Kuhn"'
Publikováno v:
Journal of Low Power Electronics. 6:291-299
Voltage dithering is a voltage scaling technique that consists in switching between two power supplies on the fly. This technique reduces the overall dynamic energy consumption of a system, but switching still consumes a considerable amount of additi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::17eb4cfd016eaacb8738c14780186351
https://doi.org/10.1166/jolpe.2010.1082
https://doi.org/10.1166/jolpe.2010.1082
Autor:
Tommy Kuhn, Wolfgang Rosenstiel, Thomas Schweizer, Johannes Maximilian Kuuhn, Dustin Peterson
Publikováno v:
FPT
In this work, we intend to demonstrate a number of reliability techniques developed for Coarse Grained Reconfigurable Architectures (CGRA). The techniques to be demonstrated target different portions of a System on Chip (SoC) Design consisting of a g
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e21e10d49435bf579999945afab3e16d
https://doi.org/10.1109/fpt.2013.6718415
https://doi.org/10.1109/fpt.2013.6718415
Publikováno v:
FCCM
This paper introduces an FPGA-based fault injection system. To realize this system a library was developed, which implements a static mapping between a circuit described at RTL or gate-level and its corresponding placed and routed FPGA design. The ai
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::291c23abb8f32d63ba307a4ba4c146ba
https://doi.org/10.1109/fccm.2013.47
https://doi.org/10.1109/fccm.2013.47
Publikováno v:
IPDPS Workshops
Triple modular redundancy (TMR) is a common method to implement fault-tolerant circuits. Traditionally, TMR is realized by triplication of components. In order to reduce the area overhead of TMR another approach was proposed on coarse grained reconfi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5e841bd54a9da0f7abb543d378f7116f
https://doi.org/10.1109/ipdpsw.2012.39
https://doi.org/10.1109/ipdpsw.2012.39
Publikováno v:
ReConFig
Hardware redundancy is a common method for improving the reliability of a system. The disadvantage of this approach is the hardware overhead and the additional power consumption. This contribution proposes a strategy for implementing low-cost triple
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b9df846f3fada6dfc6dc35c8a90ea31
https://doi.org/10.1109/reconfig.2011.57
https://doi.org/10.1109/reconfig.2011.57
Publikováno v:
DFT
In this contribution we apply a novel strategy for partial remapping to significantly enhance the reliability of coarse-grained reconfigurable architectures. If a component of the architecture is affected by a permanent error, it will be deactivated
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::97ab1077cd4f9076fcd02539e83e7ce4
https://doi.org/10.1109/dft.2011.7
https://doi.org/10.1109/dft.2011.7
Publikováno v:
ReCoSoC
In this contribution we present an approach which significantly enhances the reliability of coarse-grained reconfigurable architectures by applying a novel remapping strategy. If a component of the architecture is affected by a permanent failure, it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7f6e9614e181a24d307d76045f18c99
https://doi.org/10.1109/recosoc.2011.5981536
https://doi.org/10.1109/recosoc.2011.5981536
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783642118012
PATMOS
PATMOS
Voltage dithering is a voltage scaling technique for reducing the dynamic energy consumption. This technique enables to switch between two power supplies dynamically. However, switching consumes a considerable amount of additional energy. In this pap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0660a11f4127f7f72a5e0e73c4a2e0aa
https://doi.org/10.1007/978-3-642-11802-9_28
https://doi.org/10.1007/978-3-642-11802-9_28
Autor:
Thomas Schweizer, Wolfgang Rosenstiel, Tommy Kuhn, Julio Alexandrino Oliveira Filho, Sven Eisenhardt
Publikováno v:
Dynamically Reconfigurable Systems ISBN: 9789048134847
Dynamically Reconfigurable Systems
Dynamically Reconfigurable Systems
This chapter focuses on the utilization of fast reconfiguration to optimize area, performance, and power. The results are quantified by a synthesizable architecture model. In order to assure good applicability of the research, a C-compiler is co-deve
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7e9590b707e64b16b46d3d5d59281f59
https://doi.org/10.1007/978-90-481-3485-4_5
https://doi.org/10.1007/978-90-481-3485-4_5
Publikováno v:
ReConFig
With the increasing power density of deep submicron technology, temperature becomes one of the dominating factors for the reliability of integrated circuits. Coarse-grained reconfigurable devices typically exhibit spatially nonuniform activity, which
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::46f04f309a6aad6099a599be2d6f0343
https://doi.org/10.1109/reconfig.2009.18
https://doi.org/10.1109/reconfig.2009.18