Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Ting Li Chu"'
Publikováno v:
SoCC
This paper presents a deskew buffer using a hybrid control scheme to reduce the locking time. The function of duty cycle correction is provided as well to meet the common requirement of the digital system clock. With the aid of time-to-digital conver
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8698aa511f84089aab9c1dfe3318a9f2
https://doi.org/10.1109/socc.2015.7406903
https://doi.org/10.1109/socc.2015.7406903
Publikováno v:
VLSI Design, Vol 2017 (2017)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a92817164891c8a20eb8c2b762ce81b3
https://doi.org/10.1155/2017/6898916
https://doi.org/10.1155/2017/6898916
Publikováno v:
SoCC
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b9fdf00a3e1c03b651b21d96f8a2d397
https://doi.org/10.1109/socc.2014.6948907
https://doi.org/10.1109/socc.2014.6948907
Autor:
Ting Li Chu, Hsin Hsiung Huang, Pei Lun Wu, Wei-I Lee, Yi Lin Kuo, Kuei Ming Chen, Hung Wei Yu
Publikováno v:
Journal of Crystal Growth. 311:3037-3039
Free-standing GaN films prepared with hydride vapor-phase epitaxy (HVPE) technique usually show bowing resulting from the high densities of defects near the N-polar face after separation from the original substrates. To solve the problem, a simple te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::31309d98d9d8c0dc03a3088626a2b1ca
https://doi.org/10.1016/j.jcrysgro.2009.01.073
https://doi.org/10.1016/j.jcrysgro.2009.01.073
Autor:
Wei-I Lee, Li-Wei Tu, Hsin Hsiung Huang, Kuei Ming Chen, Pei Lun Wu, Hung Wei Yu, C. H. Chiang, Ting Li Chu
Publikováno v:
Japanese Journal of Applied Physics. 47:8394-8396
To prevent the cracking of GaN thick films grown on a sapphire substrate by hydride vapor phase epitaxy (HVPE), a novel technique without complex processes is developed. By adding a temperature ramping step in the HVPE GaN epitaxy process, more than
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b04287021db0caae1d80e159c4299cfc
https://doi.org/10.1143/jjap.47.8394
https://doi.org/10.1143/jjap.47.8394
Publikováno v:
SoCC
In this paper, a programmable clock multiplier based on delay-locked loop is presented. It provides a flexible set of multiplying factors for differential clock generation. With the aid of the newly proposed gated short pulse generator and the differ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9207dd3d73519ea857bf3452369c670b
https://doi.org/10.1109/socc.2013.6749694
https://doi.org/10.1109/socc.2013.6749694
Publikováno v:
ISPACS
VLSI Design, Vol 2013 (2013)
VLSI Design, Vol 2013 (2013)
In this paper, a high-accuracy programmable timing generator with wide-range tuning capability is proposed. With the aid of dual delay-locked loop (DLL), both of the coarse- and fine-tuning mechanisms are operated in precise closed-loop scheme to les
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::30d2ce33f5e67d9e846f6e962818a09e
https://doi.org/10.1109/ispacs.2012.6473504
https://doi.org/10.1109/ispacs.2012.6473504
Autor:
Ting-Li Chu, 朱庭立
98
In the thesis, an all-digital delay-locked loop (ADDLL) using ARM Cell-based Design Kit for TSMC 0.18um process provided by National Chip Implementation Center is presented to realize the clock deskew function. Unlike most of the ADDLL design
In the thesis, an all-digital delay-locked loop (ADDLL) using ARM Cell-based Design Kit for TSMC 0.18um process provided by National Chip Implementation Center is presented to realize the clock deskew function. Unlike most of the ADDLL design
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/23842787314283611662
Autor:
Wei-I Lee, Kuei Ming Chen, Hsin Hsiung Huang, Tung Wei Chi, Ting Li Chu, Chu Li Chao, Hung Wei Yu, Li-Wei Tu, Jenq Dar Tsay, Pei Lun Wu, Po Chun Liu
Publikováno v:
SPIE Proceedings.
As one of the most mature techniques for manufacturing free-standing GaN substrates, hydride vapor phase epitaxy (HVPE) always encounters problems associated with residue thermal stress, such as GaN bending and cracking during and after growth. This
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6e1164b54b93f12cd5880a10e83ec30c
https://doi.org/10.1117/12.814441
https://doi.org/10.1117/12.814441
Publikováno v:
VLSI Design; 2013, p1-6, 6p