Výsledky vyhledávání - "Tien-Chien Huang"

Dissertation/ Thesis

Does Self-Regulated or Guided Inquiry Perform Better? Effects of Cloud-based Science Reading and Discussion on Students' Optic Concept and Critical Thinking Intention

Autor: Tien-Chien Huang, 黃天建

103
The information courses provided currently in junior high schools are mostly focused more on operating application programs than training student’s higher order thinking skills using information technology. Majority of students enjoy playi

Externí odkaz: http://ndltd.ncl.edu.tw/handle/06634291466891989217

Zobrazit plný text záznamu

A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS

Autor: Hung-Yi Kuo, Chih-Hsien Chang, Chia-Chun Liao, Tsung-Hsien Tsai, Yu-Tso Lin, Robert Bogdan Staszewski, Tien-Chien Huang, Min-Shueh Yuan, Chao-Chieh Li, Hsien-Yuan Liao, Augusto Ronchini Ximenes, Chung-Ting Lu

Publikováno v: IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 68(5)

In this article, we introduce a fractional-N all-digital phase-locked loop (ADPLL) architecture based on a single LC-tank, featuring an ultra-wide tuning range (TR) and optimized for ultra-low area in 10-nm FinFET CMOS. Underpinned by excellent switc

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::781267e6c3d690f90035b9fbe91755e9
https://doi.org/10.1109/tcsi.2021.3059484

Zobrazit plný text záznamu

A resistor-free 4.266 Gbps LPDDR4 I/O in 10 nm FinFET CMOS technology

Autor: Ming-Hsuan Hsieh, Chin-Ming Fu, Tsung-Che Lu, Chih-Hsien Chang, Kenny Hsieh, Tien-Chien Huang

Publikováno v: 2017 Symposium on VLSI Circuits.

This paper presents a 4.266 Gbps LPDDR4 I/O with resistor-free on-die termination (ODT). The resistor-free ODT utilizes resistor-free driving unit (RFDU) with adaptive bias unit (ABU). The ABU adopts source-follower based structure which provides an

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::c433f101ec3d2258b38b88a2c29b305f
https://doi.org/10.23919/vlsic.2017.8008478

Zobrazit plný text záznamu

A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application

Autor: Ching-Fang Chen, Saman M. I. Adham, Chin-Ming Fu, Wen-Hung Huang, Chih-Hsien Chang, Tien-Chien Huang, Mao-Hsuan Chou, Tze-Chiang Huang, Ying-Yu Hsu, Chien-Chun Tsai, William Wu Shen, Min-Jer Wang, Mu-Shan Lin, Ashok B. Mehta, Shu-Chun Yang

Publikováno v: IEEE Journal of Solid-State Circuits. 49:1063-1074

A 1 Tbit/s bandwidth PHY is demonstrated through CoWoS™ platform. Two chips: SOC and embedded DRAM (eDRAM), have been fabricated in TSMC 40 nm CMOS technology and stacked on a silicon interposer chip. 1024 DQ buses operating at 1.1 Gbit/s with VDDQ

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::1eea843cef0401a6ed90deebd7c58afb
https://doi.org/10.1109/jssc.2013.2297399

Zobrazit plný text záznamu

A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8–19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS

Autor: Min-Shueh Yuan, Hung-Yi Kuo, Chung-Ting Lu, Chao-Chieh Li, Hsien-Yuan Liao, Mark Chen, Kenny Hsieh, Augusto Ronchini Ximenes, Robert Bogdan Staszewski, Chih-Hsien Chang, Tien-Chien Huang, Chia-Chun Liao, Tsung-Hsien Tsai

Publikováno v: VLSI Circuits

A tiny LC-tank-based ADPLL in 10nm FinFET CMOS achieves an area comparable to that of inverter-based ring-oscillator PLLs. A DCO occupying 0.016mm2 uses a controllable multi-turn magnetic coupling transformer to extend its tuning range to 10.8–19.3

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::00f3cbc7a046bd2cc5e0f0d31cbc323c
https://doi.org/10.1109/vlsic.2016.7573551

Zobrazit plný text záznamu

Vyhledávací nástroje:

Upřesnit hledání