Circuit-level evaluation of a new zero-cost transistor in a embedded non-volatile memory CMOS technology

Autor: Arnaud Regnier, Stephan Niel, Alexandre Malherbe, Abderrezak Marzaki, Sebastien Haendler, Hassen Aziza, Franck Julien, Thomas Sardin, M. Mantelli, Philippe Lorenzini, Paul Devoge

Publikováno v: 2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Jun 2021, Montpellier, France. pp.1-5, ⟨10.1109/DTIS53253.2021.9505137⟩
DTIS

International audience; This work presents a new transistor architecture developed by reusing already existing fabrication process steps in an embedded non-volatile memory (eNVM) CMOS technology. The proposed transistor is derived from an existing hi

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::906c65c22204cffd14cbbb4c054149ab
https://hal.archives-ouvertes.fr/hal-03502361/file/dtis21-22.pdf