Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Thomas M. Maffitt"'
Autor:
Virat Mehta, Devika Sil, V. Katragadda, E. R. Evarts, J. DeBrosse, Sanjay Mehta, Richard G. Southwick, C. Long, Abraham Arceo, Dominik Metzler, Theodorus E. Standaert, A. Gasasira, C.-C. Yang, Son Nguyen, Raghuveer R. Patlolla, P. Nieves, D. Houssameddine, E. R. J. Edwards, V. Pai, Thomas M. Maffitt, Daniel C. Worledge, Michael Rizzolo, James Chingwei Li, O. van der Straten, J. Fullam, J. Morillo, Yaocheng Liu, Heng Wu, R. Johnson, Chu Isabel Cristina, J. M. Slaughter, T. Levin, S. McDermott, R. Pujari, Guohan Hu, James J. Demarest, Daniel C. Edelstein, Ashim Dutta, Yutaka Nakamura, M. Iwatake, M.R. Wordeman
Publikováno v:
2020 IEEE International Electron Devices Meeting (IEDM).
We present the first Embedded Spin-Transfer-Torque MRAM (eMRAM) technology in a 14 nm CMOS node. A novel integration supports the highest eMRAM density (0.0273 um2 cell size), optimal magnetic tunnel junction (MTJ) placement between M1-M2 for perform
Autor:
Ramon Rodriguez, Joseph J. Oler, John R. Goss, Van Butler, Steven Burns, Akhilesh Patil, Arsovski Igor, Christopher Parkinson, Michael A. Ziegerhofer, Michael T. Fragano, Robert M. Houle, Thomas M. Maffitt, Raymond Kim
Publikováno v:
ISSCC
Ternary Content Addressable Memory (TCAM) executes a fully parallel search of its entire memory contents and uses powerful wild-card pattern matching to return search results in a single clock cycle. This capability makes TCAM attractive for implemen
Autor:
Jack Morrish, Thomas M. Maffitt, G.F. Close, Richard C. Jordan, Scott C. Lewis, Urs Frey, Evangelos Eleftheriou, Christoph Hagleitner, Matt BrightSky, C. Lam
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 60:1521-1533
A fully integrated 256-Mcell multi-level cell (MLC) phase-change memory (PCM) chip in 90-nm CMOS technology is presented. The on-chip circuitry supports fast MLC operation at 4 bit/cell. A programmable digital controller is used to optimize closed-lo
Autor:
C. W. Yeh, Yu Zhu, Asit Kumar Ray, Mark D. Drapa, Chung H. Lam, Junka Okazawa, Scott C. Lewis, Sangbum Kim, Wanki Kim, Matt BrightSky, Tu-Shun Chen, Tony Perri, Robert L. Bruce, Jack Morrish, Huai-Yu Cheng, Chia-Jung Chen, Kohji Hosokawa, Wei-Chih Chien, Thomas M. Maffitt, Richard C. Jordan, Yutaka Nakamura, Hsiang-Lan Lung, Yung-Han Ho, H. Y. Ho, Christopher P. Miller, Jerry Heath
Publikováno v:
2016 IEEE 8th International Memory Workshop (IMW).
For the first time, by using a novel multiple individual bank sensing/writing and a memory bank interleave design, we demonstrate a double date rate 2 (DDR2) DRAM like interface phase-change memory (PCM) for M-type storage class memory applications .
Autor:
Witold Kula, Terry Torng, Thomas M. Maffitt, Qiang Chen, Jonathan Z. Sun, Ruth Tong, Denny D. Tang, John K. DeBrosse, Robert Beach, Tai Min, Daniel C. Worledge, Cheng Tzong Horng, Mao-Min Chen, Po-Kang Wang, Guenole Jan, Tom Zhong, William J. Gallagher
Publikováno v:
IEEE Transactions on Magnetics. 46:2322-2327
Key design parameters of 64 Mb STT-MRAM at 90-nm technology node are discussed. A design point was developed with adequate TMR for fast read operation, enough energy barrier for data retention and against read disturbs, a write voltage satisfying the
Publikováno v:
CICC
Spin Transfer Torque Magnetoresistive RAM (STT MRAM) has uniquely attractive write performance and endurance characteristics. Nonetheless, little STT MRAM circuit hardware data has been published [1-4]. This paper describes a fully-functional 90nm 8M
Autor:
E. Gow, Thomas M. Maffitt, John A. Gabric, D. Willmott, J. S. Parenteau, William J. Gallagher, Mark C. H. Lamorey, John K. DeBrosse, M. A. Wood
Publikováno v:
IBM Journal of Research and Development. 50:25-39
MRAM (magnetic random access memory) technology, based on the use of magnetic tunnel junctions (MTJs) as memory elements, is a potentially fast nonvolatile memory technology with very high write endurance. This paper is an overview of MRAM design con
Autor:
E. Gow, K. Maloney, Andre Sturm, Malissa J. Wood, J. DeBrosse, W. Obermeyer, C. Barwin, William J. Gallagher, Heinz Hoenigschmid, Gerhard Mueller, A.R. Sitaram, D. Willmott, Stefan Lammers, Hans-Heinrich Viehmann, Thomas M. Maffitt, C. Arndt, D. Gogl, Mark C. H. Lamorey, Yu Lu, A. Bette
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:902-908
A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-/spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42/spl mu/m/sup 2/ 1-transistor 1-magnetic tun
Autor:
C. Long, K. Huang, J. DeBrosse, William J. Gallagher, R. R. He, Yu-Jen Wang, Terry Torng, V. Lam, Guenole Jan, P. K. Wang, Thomas M. Maffitt, Ruth Tong, K. Pi, S. Le, Tom Zhong, J. Teng, Y. J. Lee
Publikováno v:
2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).
We demonstrate the writability of an entire 8 Mb STT-MRAM chip and present data on the expected endurance and data retention up to 90°C. The chip utilizes a device structure that displays high spin-transfer torque efficiency and proper write-current
Autor:
Erik L. Hedberg, Christopher P. Miller, Anatol Furman, Wayne F. Ellis, Jeffrey H. Dreibelbis, H. S. Lee, Thomas M. Maffitt, John E. Barth, C.H. Stapper, Howard Leo Kalter, Sridhar Divakaruni
Publikováno v:
IBM Journal of Research and Development. 39:51-62