Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Thomas Bedecarrats"'
Autor:
Edoardo Catapano, Gerard Ghibaudo, Mikael Casse, Tadeu Mota Frutuoso, Bruna Cardoso Paz, Thomas Bedecarrats, Agostino Apra, Fred Gaillard, Silvano De Franceschi, Tristan Meunier, Maud Vinet
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 9, Pp 582-590 (2021)
This paper presents an electrical characterization and a compact modeling of FD-SOI four-gate qubit MOS devices, carried out at room temperature and in linear regime. The main figures of merit are extracted from average drain current curves using Y
Externí odkaz:
https://doaj.org/article/2ec3dad1d9f149a19156e3826f686985
Autor:
Cécile X. Yu, Simon Zihlmann, José C. Abadillo-Uriel, Vincent P. Michal, Nils Rambal, Heimanu Niebojewski, Thomas Bedecarrats, Maud Vinet, Étienne Dumur, Michele Filippone, Benoit Bertrand, Silvano De Franceschi, Yann-Michel Niquet, Romain Maurand
Publikováno v:
Nature Nanotech.
Nature Nanotech., 2023, ⟨10.1038/s41565-023-01332-3⟩
Nature Nanotechnology
Nature Nanotech., 2023, ⟨10.1038/s41565-023-01332-3⟩
Nature Nanotechnology
Spins in semiconductor quantum dots constitute a promising platform for scalable quantum information processing. Coupling them strongly to the photonic modes of superconducting microwave resonators would enable fast non-demolition readout and long-ra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fe50a2df6feab0a6140a90bffb217ecf
Publikováno v:
Solid-State Electronics
Solid-State Electronics, Elsevier, 2019, 159, pp.90-98. ⟨10.1016/j.sse.2019.03.042⟩
Solid-State Electronics, 2019, 159, pp.90-98. ⟨10.1016/j.sse.2019.03.042⟩
Solid-State Electronics, Elsevier, 2019, 159, pp.90-98. ⟨10.1016/j.sse.2019.03.042⟩
Solid-State Electronics, 2019, 159, pp.90-98. ⟨10.1016/j.sse.2019.03.042⟩
GDNMOS (Gated Diode merged NMOS) and GDBIMOS (Gated Diode merged BIMOS) were fabricated using the 28 nm node ultra-thin film UTBB FD-SOI high-k metal gate CMOS technology. The anode current and voltage were measured and simulated for a high number of
Publikováno v:
2018 S3S Proceedings
2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2018, San Francisco, United States. pp.10.5, ⟨10.1109/S3S.2018.8640159⟩
2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2018, San Francisco, United States. pp.10.5, ⟨10.1109/S3S.2018.8640159⟩
session: tunnel transistors; International audience; A novel 2-components sharp switch device integrated in high-k metal gate UTBB 28 nm FD-SOI technology is presented, analyzed and measured in DC. It features a subthreshold slope of 2 mV/decade and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1c07360b22acac7beeaadd71d9a6e487
https://hal.science/hal-02010234
https://hal.science/hal-02010234
Publikováno v:
2018 EUROSOI-ULIS Proceedings
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Mar 2018, Granada, Spain. pp.169-172, ⟨10.1109/ULIS.2018.8354761⟩
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Mar 2018, Granada, Spain. pp.169-172, ⟨10.1109/ULIS.2018.8354761⟩
sessionposter; International audience; The built-in BJT of a BIMOS fabricated in 28nm UTBB FD-SOI high-k metal technology from ST Microelectronics is investigated in common-emitter mode and in MOSFET off-state. In the weak V BE regime, field-effects
Publikováno v:
2017 ICICDT Proceedings
2017 IEEE International Conference on IC Design & Technology (ICICDT)
2017 IEEE International Conference on IC Design & Technology (ICICDT), May 2017, Austin, United States. pp.44-47, ⟨10.1109/ICICDT.2017.7993509⟩
ICICDT
2017 IEEE International Conference on IC Design & Technology (ICICDT)
2017 IEEE International Conference on IC Design & Technology (ICICDT), May 2017, Austin, United States. pp.44-47, ⟨10.1109/ICICDT.2017.7993509⟩
ICICDT
session D: SoC, DFM.TCAD; International audience; This paper presents a new device named the Gated Diode merged BIMOS (GDBIMOS) which is fabricated using the 28nm UTBB FD-SOI high-k metal gate CMOS technology. It is highly reconfigurable and topologi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b93f7cb5ab853bcde6091e0326b136d8
https://hal.science/hal-02007065
https://hal.science/hal-02007065