Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Thiruvenkadam Krishnan"'
Publikováno v:
Analog Integrated Circuits and Signal Processing. 113:307-313
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::78c9c6b9a2a3f7d75d71d6bcf3c2f5f7
https://doi.org/10.1007/s10470-022-02090-3
https://doi.org/10.1007/s10470-022-02090-3
Publikováno v:
Analog Integrated Circuits and Signal Processing. 107:683-694
Decimal multiplication is the most common operation in arithmetic applications. This paper presents an area-efficient digit-by-digit decimal multiplier using a modified binary-coded decimal digit multiplier. In general, a Binary-Coded Decimal (BCD) d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec46fbb65bc43c428e9d331b9b9a8756
https://doi.org/10.1007/s10470-020-01781-z
https://doi.org/10.1007/s10470-020-01781-z
Autor:
Thiruvenkadam Krishnan
Publikováno v:
Bioscience Biotechnology Research Communications. 13:902-907
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bce3d27c7841ae6b18266044ecd7b579
https://doi.org/10.21786/bbrc/13.2/77
https://doi.org/10.21786/bbrc/13.2/77
Publikováno v:
Materials Today: Proceedings. 33:3692-3696
Multiplication is essential arithmetic operations for the filter. In this paper, high-speed area-efficient RCA based 2-D bypassing multiplier proposed for finite-impulse response (FIR) filter implementation. Conventional CSA based 2-D bypassing multi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f46a83aae780be188c394ff0cd8fbc87
https://doi.org/10.1016/j.matpr.2020.05.803
https://doi.org/10.1016/j.matpr.2020.05.803
Publikováno v:
Materials Today: Proceedings. 33:3751-3756
The addition of binary numbers is the fundamental and most often used arithmetic operation on microprocessors, digital signal processors (DSP), and data-processing application-specific integrated circuits (ASIC). Binary adders are the crucial buildin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c1c4f38efda4cfaf58c0e214ea8d321
https://doi.org/10.1016/j.matpr.2020.06.172
https://doi.org/10.1016/j.matpr.2020.06.172
Publikováno v:
2022 8th International Conference on Advanced Computing and Communication Systems (ICACCS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1286097e26ff279a8064fcc696600cef
https://doi.org/10.1109/icaccs54159.2022.9785045
https://doi.org/10.1109/icaccs54159.2022.9785045
Autor:
Vivek Karthick Perumal, Sivaranjani Sundaralingam, Mohammed Naveeth Jafarali, Thiruvenkadam Krishnan
Publikováno v:
INTELLIGENT SYSTEMS: A STEP TOWARDS SMARTER ELECTRICAL, ELECTRONIC AND MECHANICAL ENGINEERING: Proceedings of 2nd International Conference on Industrial Electronics, Mechatronics, Electrical and Mechanical Power (IEMPOWER), 2021..
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ebf8c18682a81e47a71496010f51d10d
https://doi.org/10.1063/5.0110027
https://doi.org/10.1063/5.0110027
Publikováno v:
2021 International Conference on Decision Aid Sciences and Application (DASA).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::17ecc02a79cb17ac8043203ae51ba3a7
https://doi.org/10.1109/dasa53625.2021.9682405
https://doi.org/10.1109/dasa53625.2021.9682405
Autor:
Thiruvenkadam Krishnan
Publikováno v:
International Journal of Recent Technology and Engineering (IJRTE). 8:10189-10198
Fast Fourier Transform (FFT) acts as an element in the high-speed signal processing application, which involves the following subsequent operations, namely complex addition, complex subtraction and complex multiplication. Due to the complex multiplic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9187b972b3823c5df4950686b26ed39e
https://doi.org/10.35940/ijrte.d8604.118419
https://doi.org/10.35940/ijrte.d8604.118419
Autor:
Thiruvenkadam Krishnan, S. Saravanan
Publikováno v:
2020 6th International Conference on Advanced Computing and Communication Systems (ICACCS).
Floating point multiplication is a common operation in advance Digital Signal Processing (DSP) applications. This paper explains a 32-bit binary Floating Point Multiplier (FPM) architecture using an area efficient array multiplier. The proposed multi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::16332509a3944d7cd8e0f4711502746a
https://doi.org/10.1109/icaccs48705.2020.9074366
https://doi.org/10.1109/icaccs48705.2020.9074366