Zobrazeno 1 - 10
of 128
pro vyhledávání: '"Thilo Pionteck"'
Publikováno v:
IEEE Access, Vol 11, Pp 116219-116234 (2023)
Cyber-Physical Systems (CPSs) combine computation, networking, and physical processes. A CPS consists of various independent subsystem components with different interfaces and protocols defined by vendors. Utilizing different interfaces and protocols
Externí odkaz:
https://doaj.org/article/1f7967ee412445768dc17ff02a67f337
Autor:
Jan Moritz Joseph, Lennart Bamberg, Dominik Ermel, Behnam Razi Perjikolaei, Anna Drewes, Alberto Garcia-Ortiz, Thilo Pionteck
Publikováno v:
IEEE Access, Vol 7, Pp 135145-135163 (2019)
Heterogeneous 3D System-on-Chips (3D SoCs) are the most promising design paradigm to combine sensing and computing within a single chip. A special characteristic of communication networks in heterogeneous 3D SoCs is the varying latency and throughput
Externí odkaz:
https://doaj.org/article/740b62139bef4506842b1108a709090b
Publikováno v:
Applied Sciences, Vol 12, Iss 11, p 5659 (2022)
In computed tomography imaging, the computationally intensive tasks are the pre-processing of 2D detector data to generate total attenuation or line integral projections and the reconstruction of the 3D volume from the projections. This paper propose
Externí odkaz:
https://doaj.org/article/82d28d7db2c2406e9f40a94f36e03d97
Publikováno v:
Technologies, Vol 8, Iss 1, p 10 (2020)
Core mapping, in which a core graph is mapped to a network graph to minimize communication, is a common design problem for Systems-on-Chip interconnected by a Network-on-Chip. In conventional multiprocessors, this mapping is area-agnostic as the core
Externí odkaz:
https://doaj.org/article/238e830993ae4f5093ad06e6df464ef7
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2009 (2009)
Runtime reconfigurable system-on-chip designs for FPGAs pose manifold demands on the underlying system architecture and design tool capabilities. The system architecture has to support varying communication needs of a changing number of processing un
Externí odkaz:
https://doaj.org/article/cf96ee913b3d464d92bca8b05e8996ec
Publikováno v:
Knowledge and Information Systems.
Modern computer systems can use different types of hardware acceleration to achieve massive performance improvements. Some accelerators like FPGA and dedicated GPU (dGPU) need optimized data structures for the best performance and often use dedicated
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f3afda47e13f2f59fabcdbb7955771de
https://doi.org/10.1007/s10115-023-01891-w
https://doi.org/10.1007/s10115-023-01891-w
Publikováno v:
Distributed and Parallel Databases.
Using heterogeneous processing devices, like GPUs, to accelerate relational database operations is a well-known strategy. In this context, the operation is highly interesting for two reasons. Firstly, it incurs large processing costs. Secondly, its r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eab5033f3711a2d6453027c272edb766
https://doi.org/10.1007/s10619-023-07424-2
https://doi.org/10.1007/s10619-023-07424-2
Publikováno v:
Euro-Par 2022: Parallel Processing Workshops ISBN: 9783031312083
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc19184f7802ccd127582dd4fef1e68a
https://doi.org/10.1007/978-3-031-31209-0_11
https://doi.org/10.1007/978-3-031-31209-0_11
Publikováno v:
3D Interconnect Architectures for Heterogeneous Technologies ISBN: 9783030982287
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4c45a6e524ee3bc250b288f2db629bad
https://doi.org/10.1007/978-3-030-98229-4_9
https://doi.org/10.1007/978-3-030-98229-4_9
Publikováno v:
3D Interconnect Architectures for Heterogeneous Technologies ISBN: 9783030982287
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::56936ec59f0fb98ac791a27e9f244384
https://doi.org/10.1007/978-3-030-98229-4_5
https://doi.org/10.1007/978-3-030-98229-4_5