Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Thierry Bonnoit"'
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2018, 26 (8), pp.1438-1451. ⟨10.1109/TVLSI.2018.2818021⟩
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2018, 26 (8), pp.1438-1451. ⟨10.1109/TVLSI.2018.2818021⟩
International audience; In nanometer technologies, circuits are more and more sensitive to various kinds of perturbations. Alpha particles and atmospheric neutrons induce single-event upsets, affecting memory cells, latches, and flip-flops. They also
Publikováno v:
Design, Automation & Test in Europe (DATE'2018)
Design, Automation & Test in Europe (DATE'2018), Mar 2018, Dresden, Germany
DATE
Design, Automation & Test in Europe (DATE'2018), Mar 2018, Dresden, Germany
DATE
International audience; The double sampling paradigm is an efficient method to protect the circuits against soft-errors. But the data that are going out of the area protected by double sampling are still vulnerable. In this paper we proposed an archi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6a827eb6682b2745facc17082e8e3f19
https://hal.archives-ouvertes.fr/hal-01806232
https://hal.archives-ouvertes.fr/hal-01806232
Publikováno v:
18th IEEE Latin American Test Symposium (LATS’17)
18th IEEE Latin American Test Symposium (LATS’17), Mar 2017, Bogota, Colombia. pp.1-4
LATS
18th IEEE Latin American Test Symposium (LATS’17), Mar 2017, Bogota, Colombia. pp.1-4
LATS
International audience; The miniaturization issues from the advanced integrated circuit manufacturing technologies lead to increase the probabilities of single node upset and multiple upsets errors of neighbor nodes. The study of such conjecture is m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8c7365dc4827c5fa07c3350d52e305d4
https://hal.archives-ouvertes.fr/hal-01523901
https://hal.archives-ouvertes.fr/hal-01523901
Publikováno v:
IEEE International Symposium on Circuits and Systems (LASCAS 2017)
IEEE International Symposium on Circuits and Systems (LASCAS 2017), Feb 2017, Bariloche, Argentina. pp.1-4
LASCAS
IEEE International Symposium on Circuits and Systems (LASCAS 2017), Feb 2017, Bariloche, Argentina. pp.1-4
LASCAS
International audience; In nanometer technologies, circuits are more and more sensitive to various kinds of perturbations. Alpha particles and atmospheric neutrons are affecting storage elements as well as the combinational logic. In the past, the ma
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::35e8c4629e79b68965a5751c3bb18dd2
https://hal.archives-ouvertes.fr/hal-01523903
https://hal.archives-ouvertes.fr/hal-01523903
Publikováno v:
NEWCAS
Fast industrial test of RF circuits is today a main challenge issue with current wireless standards. As the impact of the test on the overall product cost is no longer negligible, there is a strong motivation in simplifying the test. With the emergen
Publikováno v:
Journal of Electronic Testing
Journal of Electronic Testing, Springer Verlag, 2013, 29 (3), pp.383-400. ⟨10.1007/s10836-013-5386-8⟩
Journal of Electronic Testing, Springer Verlag, 2013, 29 (3), pp.383-400. ⟨10.1007/s10836-013-5386-8⟩
Special Issue on Defect and Fault Tolerance; International audience; Drastic device shrinking, power supply reduction, increasing complexity and increasing operating speeds affect adversely the reliability of nowadays Integrate Circuits (ICs). In man
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2e6bcc05a59cd8e51026609597645d9e
https://hal.archives-ouvertes.fr/hal-01137865
https://hal.archives-ouvertes.fr/hal-01137865
Publikováno v:
Proc. of IEEE International Conference on Computer Design (ICCD'11)
IEEE International Conference on Computer Design (ICCD'11)
IEEE International Conference on Computer Design (ICCD'11), Oct 2011, Amherst, Ma., United States. pp.441-442, ⟨10.1109/ICCD.2011.6081440⟩
ICCD
IEEE International Conference on Computer Design (ICCD'11)
IEEE International Conference on Computer Design (ICCD'11), Oct 2011, Amherst, Ma., United States. pp.441-442, ⟨10.1109/ICCD.2011.6081440⟩
ICCD
ISBN 978-1-4577-1953-0; International audience; The reliability of modern Integrated Circuits is affected by nanometric scaling. In many modern designs embedded memories occupy the largest part of the die and are designed as tight as allowed by the p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fd4cb9967c02985789de0df1567c04ba
https://hal.archives-ouvertes.fr/hal-00671337
https://hal.archives-ouvertes.fr/hal-00671337
Publikováno v:
DATE
Proc. of Design Automation and Test in Europe Conference (DATE'11)
Design Automation and Test in Europe Conference (DATE'11)
Design Automation and Test in Europe Conference (DATE'11), Mar 2011, Grenoble, France. pp.1-6
Scopus-Elsevier
Proc. of Design Automation and Test in Europe Conference (DATE'11)
Design Automation and Test in Europe Conference (DATE'11)
Design Automation and Test in Europe Conference (DATE'11), Mar 2011, Grenoble, France. pp.1-6
Scopus-Elsevier
ISBN 978-1-61284-208-0; International audience; Drastic device shrinking, power supply reduction, increasing complexity and increasing operating speeds that accompanying technology scaling have reduced the reliability of nowadays ICs. The reliability