Zobrazeno 1 - 10
of 26
pro vyhledávání: '"Thiem Van CHU"'
Publikováno v:
IEEE Access, Vol 12, Pp 6926-6940 (2024)
Ensemble-based collaborative inference systems, Edge Ensembles, are deep learning edge inference systems that enhance accuracy by aggregating predictions from models deployed on each device. They offer several advantages, including scalability based
Externí odkaz:
https://doaj.org/article/25f3b7022f904ef1b16610bfb7796aa4
Autor:
Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Angel Lopez Garcia-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura
Publikováno v:
IEEE Access, Vol 12, Pp 2057-2073 (2024)
With the widespread adoption of edge AI, the diversity of application requirements and fluctuating computational demands present significant challenges. Conventional accelerators suffer from increased memory footprints due to the need for multiple mo
Externí odkaz:
https://doaj.org/article/d7aa8884e28346a9bcfad7530e418021
Publikováno v:
IEEE Access, Vol 11, Pp 5701-5713 (2023)
FPGA-based acceleration is considered a promising approach to improve the performance and power efficiency of Deep Neural Network (DNN) inference tasks. However, mapping a DNN onto an FPGA is not trivial. To make this easier, various automation frame
Externí odkaz:
https://doaj.org/article/b837d786b6084127bc5bbb4407d5c79a
Autor:
Satoru JIMBO, Daiki OKONOGI, Kota ANDO, Thiem Van CHU, Jaehoon YU, Masato MOTOMURA, Kazushi KAWAMURA
Publikováno v:
IEICE Transactions on Information and Systems. :2019-2031
Publikováno v:
2023 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS).
Autor:
Daiki Okonogi, Satoru Jimbo, Kota Ando, Thiem Van Chu, Jaehoon Yu, Masato Motomura, Kazushi Kawamura
Publikováno v:
2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).
Publikováno v:
International Journal of Networking and Computing. 11:215-230
Training machine learning models on edge devices is always a conflict with power consumption and computing cost. This paper introduces a hardware-oriented training method called ExtraFerns for a unique subset of decision tree ensembles, which signifi
Autor:
Kazutoshi Hirose, Jaehoon Yu, Kota Ando, Yasuyuki Okoshi, Angel Lopez Garcia-Arias, Junnosuke Suzuki, Thiem Van Chu, Kazushi Kawamura, Masato Motomura
Publikováno v:
2022 IEEE International Solid- State Circuits Conference (ISSCC).
Publikováno v:
FPGA
FPGA emulation is a promising approach to accelerating Network-on-Chip (NoC) modeling which has traditionally relied on software simulators. In most early studies of FPGA-based NoC emulators, only synthetic workloads like uniform and bit permutations
Publikováno v:
2021 International Conference on Field-Programmable Technology (ICFPT).