Zobrazeno 1 - 10
of 178
pro vyhledávání: '"Thermal design power"'
Publikováno v:
Applied Sciences, Vol 14, Iss 17, p 7904 (2024)
In air-cooled data centers, hot aisle containment is used to separate hot and cold air from mixing to improve cooling effectiveness. However, this creates a significant pressure imbalance between the cold and hot aisles, with the latter being high. T
Externí odkaz:
https://doaj.org/article/5b1b31afa04e4bfba4ea802b05e58576
Akademický článek
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Publikováno v:
IEEE Access, Vol 8, Pp 142843-142857 (2020)
Multicore platforms offer great potential for task-level redundancy to achieve a degree of fault-tolerance/reliability in embedded systems by exploiting the idle cores. However, due to the Thermal Design Power (TDP) constraint, it may not be possible
Externí odkaz:
https://doaj.org/article/535e4e52c9294670a78bbef6705f9f37
Autor:
Prajwal K P Bhat, K B Ramesh
Cache is a small, high-speed buffer memory between the CPU and the primary unit is a hardware component that stores data so that future requests for the data can be served faster. Cache memory must be small so that data can be used efficiently and it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::22c86342cdd1f08396674d31e1089a34
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. 10:312-323
Increasing power densities in future technology nodes is a crucial issue in multicore platforms. As the number of cores increases in them, power budget constraints may prevent powering all cores simultaneously at full performance level. Therefore, ch
Akademický článek
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Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39:779-788
Two main objectives in designing real-time embedded systems are high reliability and low power consumption. Hardware replication (e.g., standby-sparing) can provide high reliability while keeping the power consumption under control. In this paper, we
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 31:623-633
Analysis of reliability, power, and performance at hardware and software levels due to heterogeneity is a crucial requirement for heterogeneous multicore embedded systems. Escalating power densities have led to thermal issues for heterogeneous multic
Publikováno v:
IEEE Embedded Systems Letters. 12:29-32
Due to the system-level power constraints, it is encountered that not all cores in a multicore chip can be simultaneously powered-on at the highest voltage/frequency levels. Also, in the future technology nodes, reliability issues due to the suscepti
Publikováno v:
ISTC
Channel coding, or Forward Error Correction (FEC), is a crucial technology component in any digital baseband processing. Decoder IPs for advanced coding schemes like Turbo, LDPC, and Polar codes are major sources of power consumption and silicon area