Zobrazeno 1 - 10
of 32
pro vyhledávání: '"Theodore W. Manikas"'
Autor:
Theodore W. Manikas, Laura L. Spenner, Paul D. Krier, Mitchell A. Thornton, Sukumaran Nair, Stephen A. Szygenda
Publikováno v:
Journal of Systemics, Cybernetics and Informatics, Vol 9, Iss 1, Pp 89-93 (2011)
Disaster tolerance in computing and communications systems refers to the ability to maintain a degree of functionality throughout the occurrence of a disaster. We accomplish the incorporation of disaster tolerance within a system by simulating variou
Externí odkaz:
https://doaj.org/article/4445cb34685648639c5ee57e8d82d811
Autor:
Kundan Nepal, Jennifer Dworak, Alfred L. Crouch, Soha Alhelaly, Ping Gui, Theodore W. Manikas
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. 9:774-786
3D integrated circuits introduce both advantages and disadvantages for security. Among the disadvantages unique to 3D is the potential insertion of a Trojan die into the stack between two legitimate dies. Such a die could be used to snoop information
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f74e5264e1fc47f8b69bb25ec24cac5f
https://doi.org/10.1109/tetc.2020.2984162
https://doi.org/10.1109/tetc.2020.2984162
Autor:
Kundan Nepal, Jennifer Dworak, Fanchen Zhang, Theodore W. Manikas, Hui Jiang, Yi Sun, R. Iris Bahar
Publikováno v:
Journal of Electronic Testing. 35:887-900
We propose an architecture for a Field Programmable Gate Array (FPGA) based tester for a 3D stacked integrated circuit (IC). Due to the very short distances between dies in a stack that can make SerDes connections very efficient and the high density
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::94b62e9ba908294da76e015864ffefd9
https://doi.org/10.1007/s10836-019-05845-5
https://doi.org/10.1007/s10836-019-05845-5
Autor:
R. Iris Bahar, Yi Sun, Theodore W. Manikas, Matan Segal, Jennifer Dworak, Lakshmi Ramakrishnan, Kundan Nepal, Hui Jiang
Publikováno v:
ICECS
Excessive power during in–field testing can cause multiple issues, including invalidation of the test results, over- heating, and damage to the circuit. In this paper, we evaluate the reduction of capture power when specific segments of a scan chai
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1263822ed69efd81b09962e0baa142ad
https://doi.org/10.1109/icecs46596.2019.8964790
https://doi.org/10.1109/icecs46596.2019.8964790
Autor:
R. Iris Bahar, Soha Alhelaly, Jennifer Dworak, Kundan Nepal, Ping Guikundan, Theodore W. Manikas
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 34:849-861
3-D die-stacks hold great promise for increasing system performance, but difficulties in testing dies and assembling a 3-D stack are leading to yield issues and slowing the large scale manufacturing of these devices. In many cases, a single defective
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb2ed06ad00fead0318ec17582c18e4d
https://doi.org/10.1109/tcad.2015.2399441
https://doi.org/10.1109/tcad.2015.2399441
Autor:
Kundan Nepal, Jennifer Dworak, Ping Gui, Alfred L. Crouch, Soha Alhelaly, Theodore W. Manikas
Publikováno v:
NATW
While 3D integrated circuits provide many security advantages, one disadvantage is the insertion of a Trojan die into the stack. In this paper, we explore a technique to detect an extra die through delay analysis.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6cd3ade57a3bdd44fa5ba0675970769a
https://doi.org/10.1109/natw.2017.7938027
https://doi.org/10.1109/natw.2017.7938027
Autor:
Mitchell A. Thornton, Kaitlin N. Smith, Theodore W. Manikas, Anna A. Carroll, Michael A. Taylor
Publikováno v:
SysCon
Modeling the dynamic, time-varying behavior of systems and processes is a common design and analysis task in the systems engineering community. A popular method for performing such analysis is the use of Markov chains. Additionally, automated methods
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b4e5723fafcf8f03a127c870862912d
https://doi.org/10.1109/syscon.2017.7934746
https://doi.org/10.1109/syscon.2017.7934746
Publikováno v:
IEICE Transactions on Information and Systems. :2234-2242
SUMMARY In the optimization of decision diagrams, variable reordering approaches are often used to minimize the number of nodes. However, such approaches are less effective for analysis of multi-state systems given by monotone structure functions. Th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d6b510936f3714bedfd170e87b4fdbc3
https://doi.org/10.1587/transinf.2013lop0011
https://doi.org/10.1587/transinf.2013lop0011
Autor:
Theodore W. Manikas, John C. Potter, Fanchen Zhang, Ping Gui, Al Crouch, Xi Shen, Jennifer Dworak, Yi Sun, R. Iris Bahar, Kundan Nepal
Publikováno v:
NATW
We propose an architecture for an FPGA-based tester for a 3D stacked IC. Our design exploits the underlying structure of the FPGA, allowing it to be used to efficiently store and apply predefined test patterns at a high bandwidth, reducing the FPGA r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d537991dd0dce064fd881b7db78231c5
https://doi.org/10.1109/natw.2016.15
https://doi.org/10.1109/natw.2016.15