Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Theodore J. Letavic"'
Publikováno v:
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
In this paper, we discuss the fundamental design tradeoff among specific on-resistance (Ron, sp), gate charge (Cgg), quasi-saturation, and reliability characteristics for an integrated high voltage LDMOS. A novel patterned gate design is proposed and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f5d63a856c21cbdab2f4eff22882bb93
https://doi.org/10.1109/ispsd.2013.6694446
https://doi.org/10.1109/ispsd.2013.6694446
Autor:
Alvin J. Joseph, Theodore J. Letavic, James A. Slinkman, Michel J. Abou-Khalil, Mark D. Jaffe, Alan B. Botula
Publikováno v:
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
We present a new device design for 20V application in thin body SOI technology. High breakdown voltage is achieved by forming RX-bound field plates which deplete the drift region of an LDMOS structure using only lateral electric field coupling. A bas
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3aebdad9e21024dbaf5672e4ecc9e8df
https://doi.org/10.1109/ispsd.2013.6694464
https://doi.org/10.1109/ispsd.2013.6694464
Publikováno v:
Guide to State-of-the-Art Electron Devices
Power Devices and ICs control the energy flow between a power source and one or more electrical loads, regulating voltage and current, driving motors, charging batteries and facilitating safety fun ...
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::233f1c606283a1a8f9d8e8a00e764c6d
https://doi.org/10.1002/9781118517543.ch15
https://doi.org/10.1002/9781118517543.ch15
Autor:
Rick Phelps, Donald J. Cook, Helmut Nauschnig, Santosh Sharma, Georg Roerher, Alain Loiseau, Rainer Minixhofer, Theodore J. Letavic, Yun Shi, John-Ellis Monaghan, James S. Dunn, Natalie B. Feilchenfeld, Christopher Lamothe
Publikováno v:
2012 24th International Symposium on Power Semiconductor Devices and ICs.
This paper presents a 20V-rated planar dual gate oxide NLDMOS power device structure fabricated in a 180nm power management technology. The performance of the planar dual gate device structure is compared to a conventional STI-based device and it is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf0e20dcf055204e8d650f75d8097771
https://doi.org/10.1109/ispsd.2012.6229107
https://doi.org/10.1109/ispsd.2012.6229107
Autor:
Shrinivas J. Pandharpure, Theodore J. Letavic, Saurabh Sirohi, V. Subramanian, Amit A. Dikshit
Publikováno v:
2012 24th International Symposium on Power Semiconductor Devices and ICs.
The effect of drift region on the flicker noise in LDMOS devices in the linear and saturation regions is analyzed using measured data and device simulations. In the linear region, noise in the drift region arises from gate-drain overlap region and is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5a8047b66f373badec282005efea9823
https://doi.org/10.1109/ispsd.2012.6229086
https://doi.org/10.1109/ispsd.2012.6229086
Publikováno v:
MRS Proceedings. 130
A high-temperature viscoelastic stress relief technique has been investigated as a means for reducing in-plane stress encountered during zone-melt recrystallization of patterned silicon-on-insulator structures. This technique incorporates a phosphosi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0717cc714f1501398c0a00033d823b7b
https://doi.org/10.1557/proc-130-327
https://doi.org/10.1557/proc-130-327