Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Th. Nirschl"'
Autor:
Cory E. Weber, E. Ruderer, Knut Stahrenberg, Doris Schmitt-Landsiedel, Walter Hansch, A. Huber, R. Heinrich, U. Schaper, Georg Georgakos, U. Feldmann, S. Henzler, J. Einfeld, M. Fulde, Th. Nirschl, J. Sedlmeir, A. Bargagli-Stoffi, R. Kakoschke, R. Neubert, M. Sterkel, J. Fischer
Publikováno v:
Solid-State Electronics. 50:44-51
The scaling properties of the tunneling field effect transistor (TFET) are shown using standard 130 nm, 90 nm, and 65 nm CMOS process flows. For the different technology nodes the temperature dependence is presented. The device characteristic does no
Autor:
Doris Schmitt-Landsiedel, M. Oswald, M. Weis, Peng-Fei Wang, Ch. Stepper, K. Hilsenbeck, Th. Nirschl, Walter Hansch
Publikováno v:
Solid-State Electronics. 48:2281-2286
The metal oxide semiconductor field effect transistor (MOSFET) is scaling to a “tunneling epoch”, in which multiple leakage current induced by different tunneling effects exist. The complementary Si-based tunneling transistors are presented in th
Autor:
Y. Pottgiesser, J. Pottgiesser, C. Linnenbank, A. Joens, U. Schaper, U. Simon, Th. Nirschl, M. Omer, M. Johansson, D. Vietzke, M. Ostermayr, Alexander Olbrich
Publikováno v:
Microelectronics Reliability. 43:1383-1387
Autor:
Wojciech Maly, M. Huber, M. Heinitz, J. Gstöttner, D. Schmitt-Landsiedel, Th. Zanon, Th. Nirschl
Publikováno v:
Microelectronics Reliability. 40:1635-1640
New kinds of faults in digital ICs caused by particles with a certain resistance value are presented. By using an enhanced version of a three dimensional contamination-defect-fault simulator the faulty circuit behaviour caused by these defects and ap
Autor:
G. Knoblinger, M. Sterkel, M. Weis, M. Fulde, Walter Hansch, Th. Nirschl, Gerhard Wachutka, A. Heigl, Doris Schmitt-Landsiedel, M. Wirnshofer, Klaus Von Arnim
Publikováno v:
2008 2nd IEEE International Nanoelectronics Conference.
We present fabrication, optimization and application aspects of complementary Multiple-Gate Tunneling FETs (MuGTFETs). Tunneling FETs are implemented in a MuGFET technology for the first time. N- and p-type tunneling currents are observed within a si
Autor:
M. Sterkel, A. Bargagli-Stoffi, Doris Schmitt-Landsiedel, J. Fischer, W. Hansch, S. Henzler, Peng-Fei Wang, Th. Nirschl
Publikováno v:
Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..
The tunneling field effect transistor (TFET) is a quantum-mechanical device which is able to extend the epoch of the standard CMOS process by offering reduced short channel effects and smaller leakage currents. First, the mode of operation of the TFE
Autor:
Alexander Olbrich, K. Schrufer, R. Kakoschke, Doris Schmitt-Landsiedel, T. Schulz, Cory E. Weber, E. Ruderer, Walter Hansch, R. Heinrich, J. Sedlmeir, J. Holz, Th. Nirschl, Martin Ostermayr, Georg Georgakos, Christian Pacha, Peng-Fei Wang
Publikováno v:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
This work presents tunneling field effect transistors (TFET) fabricated with 130nm and 90nm process flows. Good performance of the TFET is achieved. A novel mixed TFET/CMOS (TCMOS) logic family exhibits the advantages with respect to power consumptio
Publikováno v:
Simulation of Semiconductor Processes and Devices 2004 ISBN: 9783709172124
For low power application, a semiconductor device with a low subthreshold leakage current is preferred. In this work a tunneling FET (TFET) with a reduced subthreshold leakage current is investigated by MEDICI device simulation.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4d1c0f26cc1388eed9b7c3a13340bfa2
https://doi.org/10.1007/978-3-7091-0624-2_23
https://doi.org/10.1007/978-3-7091-0624-2_23
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