Zobrazeno 1 - 10
of 251
pro vyhledávání: '"Testability analysis"'
Publikováno v:
Frontiers in Energy Research, Vol 11 (2023)
The information monitoring of distribution networks usually relies on multiple measurement systems, and the placement and number of measurement configurations are also restricted by objective factors. It is highly likely that insufficient measurement
Externí odkaz:
https://doaj.org/article/929706438ca949889bea958ad74c55b2
Publikováno v:
Electronics; Volume 11; Issue 10; Pages: 1589
DC–DC converter fault diagnosis, executed via neural networks built by exploiting the information deriving from testability analysis, is the subject of this paper. The networks under consideration are complex valued neural networks (CVNNs), whose f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e9aff2a3b5162edf1fb851e323acd5b4
Autor:
Francesco Grasso, Riccardo Belardi, Marco Bindi, Stefano Manetti, Maria Cristina Piccirilli, Igor Aizenberg, Antonio Luchetta
Publikováno v:
Advances in Science, Technology and Engineering Systems Journal. 5:488-498
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9afb9084057809b135c196c6d301899d
https://doi.org/10.25046/aj050458
https://doi.org/10.25046/aj050458
Akademický článek
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Publikováno v:
VLSI-SoC
In this research work, we aim to formalize the analysis of Physically Unclonable Functions (PUF) constructions. First, we present a testability analysis scheme that leverages the correlation spectra properties of Boolean functions to assess the quali
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a07b2d552cc36d5de7fef7d51e5ef199
https://doi.org/10.1109/vlsi-soc53125.2021.9607011
https://doi.org/10.1109/vlsi-soc53125.2021.9607011
Akademický článek
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Publikováno v:
2021 IEEE Asia-Pacific Conference on Image Processing, Electronics and Computers (IPEC).
In order to analyze the testability of hierarchical system, a testability modeling and analysis method based on multi signal flow graph model is proposed. In this method, the hierarchical structure model of hierarchical system is established by using
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cbdb493f6595557e0ba0ff6f73e390d6
https://doi.org/10.1109/ipec51340.2021.9421259
https://doi.org/10.1109/ipec51340.2021.9421259
Autor:
Marco Bindi, Francesco Grasso, Antonio Luchetta, Maria Cristina Piccirilli, Riccardo Belardi, Igor Aizenberg, Stefano Manetti
Publikováno v:
Electronics, Vol 10, Iss 349, p 349 (2021)
Electronics
Volume 10
Issue 3
Electronics
Volume 10
Issue 3
In this paper, we present a new method designed to recognize single parametric faults in analog circuits. The technique follows a rigorous approach constituted by three sequential steps: calculating the testability and extracting the ambiguity groups
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c8fd9ba08accd20045be14d508fb3c51
https://www.mdpi.com/2079-9292/10/3/349
https://www.mdpi.com/2079-9292/10/3/349
Akademický článek
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Publikováno v:
2020 15th IEEE Conference on Industrial Electronics and Applications (ICIEA).
Considering the characteristics of reusable liquid rocket engines, a hierarchical modeling method of Reusable liquid rocket engines testability based on multi-signal flow model is proposed. Then, a testability model at whole engine, subsystem and com
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ded9c00d37ffca819df2b8ee8c3213e8
https://doi.org/10.1109/iciea48937.2020.9248150
https://doi.org/10.1109/iciea48937.2020.9248150