Zobrazeno 1 - 10
of 26
pro vyhledávání: '"Teruo Shibano"'
Publikováno v:
Journal of Electron Spectroscopy and Related Phenomena. 148:75-79
X-ray absorption and emission spectroscopic study at the Hf L 1 edge was applied to investigate the local structure around hafnium atoms in Hf(Si)O x ultra-thin films, which are the most promising candidates for the high- k gate dielectric material o
Publikováno v:
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. 17:799-804
Experimental studies of the etching of platinum have been performed with a photoresist mask in Ar/Cl2 plasmas. The etch rate of platinum decreased with addition of Cl2, showing no enhancement of etching by Cl2 addition. Moreover, the etch rate of pla
Publikováno v:
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. 16:502-508
Experimental studies of the etching of platinum with a SiO2 etching mask in an Ar/O2 mixed gas plasma were performed. The etching selectivity of platinum to SiO2 increases with the addition of oxygen, and a high etching selectivity of more than 6 is
Autor:
Teruo Shibano, Tadashi Nishimura, Tsuyoshi Horikawa, Keiichirou Kashihara, H. Itoh, Tomonori Okudaira, Yoshikazu Ohno, Yoshikazu Tsunemine
Publikováno v:
Integrated Ferroelectrics. 11:101-109
A process technique to integrate the sputter-deposited BST thin film into the DRAM is discussed. With some reconsiderations concerning the grain structure of the BST, the care of the electrode edge, the thermal stability of the capacitor characterist
Publikováno v:
Technical Digest., International Electron Devices Meeting.
A high-performance CMOS technology and cell structure for a megabit EEPROM are described. A novel EEPROM (electrically erasable programmable read-only memory) cell called a stacked floating gate with self-aligned tunnel region (SSTR) cell has been de
Autor:
H. Miyatake, Takahisa Eimori, K. Fujiwara, Atsuhiro Fujii, Shin'ichi Satoh, H. Itoh, Wataru Wakamiya, T. Katoh, T. Tsutsumi, Teruo Shibano, Hiroji Ozaki
Publikováno v:
Technical Digest., International Electron Devices Meeting.
The authors describe key points of 0.5- mu m technologies for fabricating high-density memory devices such as 16-Mb DRAM (dynamic random access memory). The main features of the technologies are the use of field-shield isolation and a W contact sourc
Autor:
Y. Hayashide, M. Asakura, T. Katayama, A. Yoshida, Tsuyoshi Horikawa, Teruo Shibano, K. Sato, Hiroshi Kimura, T. Maruyama, S. Kishimura, Y. Ohno, T. Nishimura, H. Sumitani, K. Moriizumi, K. Namba, Hirokazu Miyoshi, H. Itoh, Shin'ichi Satoh, Takahisa Eimori, J. Matsufusa
Publikováno v:
Proceedings of IEEE International Electron Devices Meeting.
Thin film of (Ba/sub 0.75/Sr/sub 0.25/)TiO/sub 3/ with equivalent SiO/sub 2/ thickness of 0.47 nm has been developed for capacitor dielectric film of 256 Mbit DRAM. A novel cell design named FOGOS (FOlded Global and Open Segment bit-line cell) struct
Autor:
K. Fukumoto, Takahisa Eimori, Y. Ohno, Takeharu Kuroiwa, H. Shinkawata, T. Nishimura, Hiromi Itoh, T. Okudaira, Teruo Shibano, Tsuyoshi Horikawa, K. Kashihara, Hidenori Miyoshi, Kazutami Arimoto, Y. Hashizume
Publikováno v:
Proceedings of 1994 VLSI Technology Symposium.
The stored charges in the capacitor of the DRAM cell are decreased, as the power supply voltage and the memory cell area are reduced on the trend of the dimension shrinkage. To get sufficient capacitance of memory cell is one of the most important re
Autor:
Teruo Shibano, Noboru Mikami, Takeharu Kuroiwa, Tsuyoshi Horikawa, F. Uchikawa, H. Abe, S. Matsuno, Shin'ichi Satoh, Takaaki Kawahara, Koichi Ono
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
Great efforts have been made for the integration of high dielectric constant (Ba,Sr)TiO/sub 3/ (BST) capacitors into DRAMs. This paper presents the current state of the art in BST capacitor technology for Gbit-scale DRAMs, with emphasis on key techni
Autor:
Mikio Yamamuka, Teruo Shibano, H. Ogata, Akimasa Yuuki, Tsuyoshi Horikawa, Noboru Mikami, H. Abe, Kouichi Ono, Tetsuro Makita, N. Hirano, H. Maeda
Publikováno v:
Proceedings of International Electron Devices Meeting.
Simple stacked cell capacitors for 1 Gbit DRAMs have been constructed with a thick storage node of ruthenium (Ru) and high dielectric constant CVD-(Ba,Sr)TiO/sub 3/ films of equivalent oxide thickness teq=0.50 nm with an excellent step coverage. A st