Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Terren Lu"'
Autor:
Terren Lu, Stephen Tseng, Myongseob Kim, J. Y. Lai, Liam Madden, Woon-Seong Kwon, Suresh Ramalingam, Jonathan Chang, Genie Tsai, Steve Chiu
Publikováno v:
Journal of Microelectronics and Electronic Packaging. 12:67-71
Technology challenges and solutions in the development and manufacturing of stacked silicon interconnect (SSI) technology have been investigated with the established foundry and outsourced semiconductor assembly and test ecosystem. Key enabling techn
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b59146d9830329d5e8cd22ac10d984a
https://doi.org/10.4071/imaps.453
https://doi.org/10.4071/imaps.453
Publikováno v:
2017 IEEE 67th Electronic Components and Technology Conference (ECTC).
Large 2.5D IC leads the trend for Field Programmable Gate Array (FPGA), graphic, and network application. Chip module (CM) is comprised of top die and Si interposer, and underfill (UF) is fully filled between them. However, coefficient of thermal exp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d62a3d7e3051f8d49689548f17fde8e8
https://doi.org/10.1109/ectc.2017.210
https://doi.org/10.1109/ectc.2017.210
Autor:
Liam Madden, J. Y. Lai, Genie Tsai, Myongseob Kim, Terren Lu, Stephen Tseng, Steve Chiu, Jonathan Chang, Suresh Ramalingam, Woon-Seong Kwon
Publikováno v:
International Symposium on Microelectronics. 2013:000217-000222
Technology challenges and solutions in the development and manufacturing of Stacked Silicon Interconnect (SSI) Technology have been investigated with the established foundry and OSAT ecosystem. Key enabling technologies, such as TSV processing, inter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eee0a3fe49b7e3a5aaf12c80272b1663
https://doi.org/10.4071/isom-2013-tp11
https://doi.org/10.4071/isom-2013-tp11
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
Warpage control is a key process character for 2.5D IC without Through-Silicon Vias (TSV). For low cost package trend, TSV is not used for advanced 2.5D IC package. Yield is still an issue for 2.5D IC package, Die-Bonding (DB) last process is applied
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9be3fc7e1cc8a52148ae345f7739eac9
https://doi.org/10.1109/ectc.2016.164
https://doi.org/10.1109/ectc.2016.164
Autor:
Stephen Chen, Hsien-Wen Chen, Chen-Yu Huang, Steve Chiu, Ming-Hsien Yang, Stephen Tseng, Shih-Liang Peng, Terren Lu, J. Y. Lai
Publikováno v:
2014 IEEE 64th Electronic Components and Technology Conference (ECTC).
The applications of 2.5D/3D IC integration have been increasing in recent years, which enable high-density and heterogeneous ICs that can be assembled in one package using through silicon interposer (TSI). In this paper, the integration study of inte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da4263c8bfb18236a84999853d6156f5
https://doi.org/10.1109/ectc.2014.6897258
https://doi.org/10.1109/ectc.2014.6897258
Autor:
Woon-Seong Kwon, Myongseob Kim, Jonathan Chang, Ramalingam, Suresh, Madden, Liam, Genie Tsai, Stephen Tseng, Lai, J. Y., Terren Lu, Steve Chiu
Publikováno v:
Journal of Microelectronic & Electronic Packaging; 2015, Vol. 12 Issue 2, p67-71, 5p