Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Terence J. Weir"'
Progress Toward Superconductor Electronics Fabrication Process With Planarized NbN and NbN/Nb Layers
Autor:
Sergey K. Tolpygo, Justin L. Mallek, Vladimir Bolkhovsky, Ravi Rastogi, Evan B. Golden, Terence J. Weir, Leonard M. Johnson, Mark A. Gouker
Publikováno v:
IEEE Transactions on Applied Superconductivity. 33:1-12
To increase density of superconductor digital and neuromorphic circuits by 10x and reach integration scale of $10^8$ Josephson junctions (JJs) per chip, we developed a new fabrication process on 200-mm wafers, using self-shunted Nb/Al-AlOx/Nb JJs and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7ba16a9096a59d229125e40940a6b884
https://doi.org/10.1109/tasc.2023.3246430
https://doi.org/10.1109/tasc.2023.3246430
Publikováno v:
IEEE Transactions on Applied Superconductivity. 33:1-11
We present measurements of the self- and mutual inductance of NbN and bilayer NbN/Nb inductors with Nb ground plane(s) fabricated in an advanced process for superconductor electronics developed at MIT Lincoln Laboratory. In this process, the signal t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::aacba5354e0200fe41a74a225df75bd8
https://doi.org/10.1109/tasc.2023.3244772
https://doi.org/10.1109/tasc.2023.3244772
Autor:
Vladimir Bolkhovsky, Ravi Rastogi, Evan Golden, Sergey K. Tolpygo, Alex Wynn, Terence J. Weir, Scott Zarr, Alexandra Day, Leonard M. Johnson
Publikováno v:
IEEE Transactions on Applied Superconductivity. 29:1-13
In superconductor electronics fabrication processes developed at MIT Lincoln Laboratory, Josephson junctions (JJs) are placed near the top of the stack composed of nine or ten superconducting layers. We discuss the effects of this placement and other
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c7e7da1bb53c112ec5fc83e13a4cf1db
https://doi.org/10.1109/tasc.2019.2904919
https://doi.org/10.1109/tasc.2019.2904919
Data are presented on mutual and self-inductance of various inductors used in multilayered superconductor integrated circuits: microstrips and striplines with widths of signal traces from 250 nm to a few micrometers, located on the same circuit layer
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::13163b40b4e6a9a12c9b70938cb299ba
Publikováno v:
Superconductor Science and Technology. 34:085005
Data are presented on the inductance of various features used in superconductor digital integrated circuits: microstrip and stripline inductors with linewidths down to 120 nm and different combinations of ground plane layers, effect of perforations o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c245029582296a24e68828c4b85fa679
https://doi.org/10.1088/1361-6668/ac04b9
https://doi.org/10.1088/1361-6668/ac04b9
Autor:
Daniel E. Oates, Vladimir Bolkhovsky, Jason J. Plant, Renee D. Lambert, Manuel Docanto, Rabindra N. Das, Ravi Rastogi, Scott Zarr, Terence J. Weir, Dmitri Shapiro, Leonard M. Johnson, C. Galbraith
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
Today, microbump-based flip-chip technology is a compelling option for heterogeneous integration in microelectronic packaging. Performance as well as density (smaller form factor) requirements continue to drive smaller, microbump-based, finer pitch i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::db6f09164c9c826bc089d37b121c5e7f
https://doi.org/10.1109/ectc.2019.00248
https://doi.org/10.1109/ectc.2019.00248
Autor:
Sergey K. Tolpygo, Vasili K. Semenov, Leonard M. Johnson, Terence J. Weir, Vladimir Bolkhovsky, Mark A. Gouker, C. Galbraith
Publikováno v:
IEEE Transactions on Applied Superconductivity. 25:1-5
Inductance of superconducting thin-film inductors and structures with linewidth down to 250 nm has been experimentally evaluated. The inductors include various striplines and microstrips, their 90-degree bends and meanders, interlayer vias, etc., typ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::983a54e8746a1c1d8fd556a0a8b0a134
https://doi.org/10.1109/tasc.2014.2369213
https://doi.org/10.1109/tasc.2014.2369213
Autor:
Leonard M. Johnson, Sergey K. Tolpygo, Vladimir Bolkhovsky, Mark A. Gouker, William D. Oliver, Terence J. Weir
Publikováno v:
IEEE Transactions on Applied Superconductivity. 25:1-12
A fabrication process for Nb/Al-AlOx/Nb Josephson junctions (JJs) with sizes down to 200 nm has been developed on a 200-mm-wafer tool set typical for CMOS foundry. This process is the core of several nodes of a roadmap for fully-planarized fabricatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f5a064a4bc3ee711248024409ee71bd1
https://doi.org/10.1109/tasc.2014.2374836
https://doi.org/10.1109/tasc.2014.2374836
Autor:
Ravi Rastogi, Alex Wynn, Alexandra Day, Sergey K. Tolpygo, Terence J. Weir, Scott Zarr, Vladimir Bolkhovsky, Leonard M. Johnson
We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junctions, and one layer of MoNx kinetic inductors. The minimum feature si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a16e253bdac1c5165333ed3b4c4c0753
Autor:
Alex Wynn, Daniel E. Oates, Terence J. Weir, Vladimir Bolkhovsky, Mark A. Gouker, Leonard M. Johnson, Sergey K. Tolpygo
Publikováno v:
IEEE Transactions on Applied Superconductivity. :1-1
We review the salient features of two advanced nodes of an 8-Nb-layer fully planarized process developed recently at MIT Lincoln Laboratory for fabricating Single Flux Quantum(SFQ) digital circuits with very large scale integration on 200-mm wafers:
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::73068f5a5420b277c0a446f523994152
https://doi.org/10.1109/tasc.2016.2519388
https://doi.org/10.1109/tasc.2016.2519388