Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Tejas Jhaveri"'
Autor:
Jason D. Hibbeler, Lars W. Liebmann, Andrzej J. Strojwas, Larry Pileggi, Vyacheslav Rovner, Tejas Jhaveri
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29:509-527
The financial backbone of the semiconductor industry is based on doubling the functional density of integrated circuits every two years at fixed wafer costs and die yields. The increasing demands for 'computational' rather than 'physical' lithography
Publikováno v:
SPIE Proceedings.
The traditional design rule paradigm of defining the illegal areas of the design space has been deteriorating at the advanced technology nodes. Radical design space restrictions, advocated by the regular design fabrics methodology, provide an opportu
Autor:
Tejas Jhaveri, Andrzej Strojwas
Publikováno v:
SPIE Proceedings.
Layout pattern minimization has become a necessity at the 20nm technology node. Not only is it the only way to guarantee convergence for source mask optimization, having a well defined design space by limiting the total number of layout patterns, is
Autor:
Zhipan Li, Robert John Socha, Tejas Jhaveri, Xiaofeng Liu, Luoqi Chen, Stephen Hsu, Andrzej Strojwas, Mircea Dusa
Publikováno v:
SPIE Proceedings.
In this paper the co-optimization of the source, mask, and design is discussed. In particular the printing of the pdBRIX logic templates and SRAM cell is investigated through Tachyon SMO for the contact and metal 1 layer. Both the SRAM and pdBRIX log
Publikováno v:
SPIE Proceedings.
The semiconductor industry has pursued a rapid pace of technology scaling to achieve an exponential component cost reduction. Over the years the goal of technology scaling has been distilled down to two discrete targets. Process engineers focus on su
Autor:
Nathaniel D. Hieter, Tejas Jhaveri, Vyacheslav Rovner, Larry Pileggi, Lars W. Liebmann, Jason D. Hibbeler, Matthew Moe
Publikováno v:
SPIE Proceedings.
The concept of template-based design-technology co-optimization as a means of curbing escalating design complexity and increasing technology qualification risk is described. Data is presented highlighting the design efficacy of this proposal in terms
Autor:
Tejas Jhaveri, Andrzej J. Strojwas
Publikováno v:
SPIE Proceedings.
Is it argued that computational lithography is made tractable by limiting the number of unique layout patterns in the design. The use of regular design fabrics have been proposed and successfully used to create designs by introducing deviations to an
Publikováno v:
SPIE Proceedings.
The unavailability of extreme ultra violet lithography (EUVL) for mass production of the 22nm technology node has created a significant void for mainstream lithography solutions. To fill this void, alternate lithography solutions that were earlier de
Publikováno v:
DAC
Achieving the required time-to-market with economically acceptable yield levels and maintaining them in volume production has become a daunting task for the advanced technology nodes. These difficulties are primarily attributable to the increase in p
Autor:
Jason D. Hibbeler, Larry Pileggi, Tejas Jhaveri, Lars W. Liebmann, Greg Northrop, Vyacheslav Rovner
Publikováno v:
SPIE Proceedings.
The time-to-market driven need to maintain concurrent process-design co-development, even in spite of discontinuous patterning, process, and device innovation is reiterated. The escalating design rule complexity resulting from increasing layout sensi