Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Tatsuo Omori"'
Autor:
Tadahiro Kuroda, Tatsuo Omori, Shinya Takamaeda-Yamazaki, Masato Motomura, Mototsugu Hamada, Kota Shiba, Kodai Ueyoshi
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 68:692-703
A 28.8-GB/s 96-MB 3D-stacked SRAM is presented. A total of eight SRAM dies, designed in a 40-nm CMOS process, are vertically stacked and connected using an inductive coupling wireless link with a low-voltage NMOS push-pull transmitter that reduces th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae13937be9b5039dc428b878b61372bb
https://doi.org/10.1109/tcsi.2020.3037892
https://doi.org/10.1109/tcsi.2020.3037892
Publikováno v:
IEEE Solid-State Circuits Letters. 3:370-373
An area-efficient low-power wireless inductive coupling interface for a 3-D-stacked high-bandwidth memory is presented. A test chip was fabricated in a 40-nm complementary metal–oxide semiconductor (CMOS) technology and 1.5-Gb/s 2.2-pJ/bit communic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6b76de2af75593323baa69f3aa639d1e
https://doi.org/10.1109/lssc.2020.3022417
https://doi.org/10.1109/lssc.2020.3022417
Publikováno v:
2021 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bdd2ef83636392c5d131099a407bbd17
https://doi.org/10.1109/edaps53774.2021.9657043
https://doi.org/10.1109/edaps53774.2021.9657043
Publikováno v:
ASP-DAC
A 3D-stacked SRAM using an inductive coupling wireless inter-chip communication technology (TCI) is presented for an AI inference accelerator. The energy and area efficiency are improved thanks to the introduction of a proposed low-voltage NMOS push-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bcd244c4273fb8b3f5d5bffc00507fd1
https://doi.org/10.1145/3394885.3431642
https://doi.org/10.1145/3394885.3431642
Publikováno v:
ASP-DAC
Sub-10-μm on-chip coils are designed and prototyped for the multi-hop inductive coupling interface in a 40-nm CMOS. Multi-layer coils and a new receiver circuit are employed to compensate the decrease of the coupling coefficient due to the small coi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b9c17d3f9e7f04edc8ea741c25498a4
https://doi.org/10.1145/3394885.3431649
https://doi.org/10.1145/3394885.3431649
Publikováno v:
2020 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS).
This paper conducts an in-depth analysis of crosstalk in a multi-hop inductive coupling interface for a 3D-stacked memory and proposes two countermeasures. The crosstalk among seven stacked dies is analyzed based on 3D electromagnetic (EM) simulation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a0375500a4c26c2a96d5260741cca34
https://doi.org/10.1109/edaps50281.2020.9312890
https://doi.org/10.1109/edaps50281.2020.9312890
Autor:
Tatsuo Omori, Mototsugu Hamada, Kota Shiba, Shinya Takamaeda-Yamazaki, Tadahiro Kuroda, Kota Ando, Kodai Ueyoshi, Kazutoshi Hirose, Masato Motomura
Publikováno v:
ISCAS
A 28.8-GB/s 96-MB 3D-stacked SRAM is presented. A total of eight SRAM dies, designed in a 40-nm CMOS process, are vertically stacked and connected using an inductive coupling wireless link with a low-voltage NMOS push-pull transmitter that reduces th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::86e053a677c31b146632a2350305cc39
https://doi.org/10.1109/iscas45731.2020.9181008
https://doi.org/10.1109/iscas45731.2020.9181008
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