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pro vyhledávání: '"Takatoshi Kakizaki"'
Autor:
Kazuhiko Mishima, Akihiko Honda, Shinichi Egashira, Toru Nakamura, Tamio Takeuchi, Nozomu Hayashi, Takatoshi Kakizaki, Kaushalia Dubey, Hiroshi Tanaka, Tomohiro Mase
Publikováno v:
SPIE Proceedings.
The rapid advancement in lithography and continuing shrink in feature dimensions demand tighter overlay tolerances for fabrication of memory circuits with higher yields (Refer to table 1 for ITRS overlay requirements). To meet tight overlay tolerance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1382aea1b6be3f1898999d6baf48045a
https://doi.org/10.1117/12.711324
https://doi.org/10.1117/12.711324
