Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Takashi Tokairin"'
Autor:
Kenichi Sami, Tong Wang, Hiroshi Yoshida, Yosuke Ogasawara, Yuki Tuda, Tatsuhiko Maruyama, Takashi Tokairin, Masayoshi Oshiro, Ta Tuan Thanh, Naotaka Koide
Publikováno v:
IEICE Transactions on Electronics. :833-840
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aec2535c9bf9e5264855e6a8c0d03723
https://doi.org/10.1587/transele.e100.c.833
https://doi.org/10.1587/transele.e100.c.833
Autor:
Ta Tuan Thanh, Akihide Sai, Hidenori Okuni, Takashi Tokairin, Satoshi Kondo, Tetsuro Itakura, Masanori Furuta
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:3125-3136
This paper presents a low-power hybrid-loop receiver (RX) with high-interference tolerance for Bluetooth low energy (BLE). The hybrid-loop structure based on an all-digital phase-locked loop enables the RX to both enhance the interference tolerance a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4eb65aeb5e5a4fecf698056750d4563c
https://doi.org/10.1109/jssc.2016.2603993
https://doi.org/10.1109/jssc.2016.2603993
Autor:
Thanh Ta Tuan, Tong Wang, Naotaka Koide, Takashi Tokairin, Masayoshi Oshiro, Yosuke Ogasawara, Akihide Sai
Publikováno v:
ESSCIRC
A low-power low-cost high-link-budget sliding IF (SIF) transceiver, which utilizes a new TRX matching network (RF I/O) and satisfies BLE 5.0 standard, is proposed. The proposed RF I/O realizes image rejection (IR) function at RX side without loss pen
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2b2b6e11eef87cc47a38ab8732262ab
https://doi.org/10.1109/esscirc.2018.8494302
https://doi.org/10.1109/esscirc.2018.8494302
Autor:
Toru Hashimoto, Akihide Sai, Yosuke Ogasawara, Tatsuhiko Maruyama, Masayoshi Oshiro, Ta Tuan Thanh, Jun Ihara, Yuki Tuda, Tong Wang, Takashi Tokairin
Publikováno v:
VLSI Circuits
We present a high link budget Bluetooth Low-Energy (BLE) SoC supporting Bluetooth 5 new features. A conduction-angle-reduced 8dBm power amplifier utilizing a real-time output waveform symmetry feedback (SFB) is proposed to achieve both high efficienc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::416262b9c3711776fa83dbe142672954
https://doi.org/10.1109/vlsic.2018.8502258
https://doi.org/10.1109/vlsic.2018.8502258
Autor:
Masayoshi Oshiro, Tatsuhiko Maruyama, Hiroshi Yoshida, Tong Wang, Yuki Tuda, Naotaka Koide, Ta Tuan Thanh, Kenichi Sami, Takashi Tokairin, Yosuke Ogasawara
Publikováno v:
A-SSCC
A fully-integrated system-on-chip (SoC) for Bluetooth Low Energy (BLE) with 3.2 mA RX and 3.5 mA TX current consumption is presented. To achieve both low current consumption and high performance, the SoC employs a sliding-IF architecture that avoids
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be85c3f46f45094107c336e00db272f4
https://doi.org/10.1109/asscc.2016.7844120
https://doi.org/10.1109/asscc.2016.7844120
Autor:
Hidenori Okuni, Satoshi Kondo, Tetsuro Itakura, Takashi Tokairin, Masanori Furuta, Ta Tuan Thanh, Akihide Sai
Publikováno v:
ISSCC
Various Ultra-Low-Power (ULP) RX architectures [1–4] for Bluetooth™ Low Energy (BLE) have been developed for minimizing the RX power consumption. A PLL-based RX architecture [1] is very attractive to improve the energy efficiency. While the singl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e06afdad1dd0b03d108567751d4f5271
https://doi.org/10.1109/isscc.2016.7418094
https://doi.org/10.1109/isscc.2016.7418094
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:572-582
A low-IF/zero-IF reconfigurable analog baseband IC embodying an automatic I/Q imbalance cancellation scheme is reported. The chip, which comprises a down-conversion mixer, an analog baseband filter, and a programmable gain amplifier, achieves a high
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3642e66a841521a31fed86bf9582015f
https://doi.org/10.1109/jssc.2010.2102510
https://doi.org/10.1109/jssc.2010.2102510
Publikováno v:
IEEE Journal of Solid-State Circuits. 45:2582-2590
A 2.1-to-2.8-GHz low-power consumption all-digital phase locked loop (ADPLL) with a time-windowed time-to-digital converter (TDC) is presented. The time-windowed TDC uses a two-step structure with an inverter- and a Vernier-delay time-quantizer to im
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95a8aef023f2ef70b31f6065672e26a9
https://doi.org/10.1109/jssc.2010.2076591
https://doi.org/10.1109/jssc.2010.2076591
Autor:
Tadashi Maeda, Takashi Tokairin
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 57:1538-1548
This paper describes a simple, analytical expression for quantization noise in a time-to-digital converter (TDC) based on Fourier-series analysis. We analyzed inverter propagation-delay variations due to fluctuations in the threshold voltage, and her
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e3377078ca666e11e36407daab481b14
https://doi.org/10.1109/tcsi.2009.2035411
https://doi.org/10.1109/tcsi.2009.2035411
Autor:
Keiichi Numata, Noriaki Matsuno, Tadashi Maeda, Tomoyuki Yamase, Nobuhide Yoshida, Hikaru Hida, R. Walkington, Shinichi Hori, Y. Takahashi, Hitoshi Yano, K. Yanagisawa, Takashi Tokairin
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:2481-2490
This paper describes a 0.18-mum CMOS direct-conversion dual-band triple-mode wireless LAN transceiver. The transceiver has a concurrent dual-band low-noise amplifier for low power consumption with a low noise figure, a single widely tunable low-pass
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e07c1c2b1c095d0e5dcfe81db300bb34
https://doi.org/10.1109/jssc.2006.883323
https://doi.org/10.1109/jssc.2006.883323