Zobrazeno 1 - 10
of 63
pro vyhledávání: '"Takashi Miyamori"'
Autor:
Hiroyuki Usui, Nau Ozaki, Hui Xu, Takeshi Kodaka, Takashi Miyamori, Soichiro Hosoda, Kazumasa Yamamoto, Nobuhiro Nonogaki, Jun Tanabe, Toru Sano
Publikováno v:
IEICE Transactions on Electronics. :360-368
Publikováno v:
Journal of Architecture and Planning (Transactions of AIJ). 77:2673-2680
The port open space planning policy was prescribed in 1973. However, this rule remains without a change. A purpose of this study is to clarify the next matter through the above. 1) To clarify the actual situation of the design of the port open spaces
Autor:
Yousuke Hagiwara, Yasuo Ohara, Takashi Miyamori, Yukihito Oowaki, Mototsugu Hamada, Yu Kikuchi, T. Maeda, Hiroyuki Hara, Manabu Watanabe, Yasuhiro Koshio, Masatoshi Fukuda, Makoto Takahashi, Hideaki Yamamoto, Hirokazu Ezawa, T. Fujita, M. Takahashi, Hideho Arakida, Takayoshi Shimazawa
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:32-41
In this paper we introduce a 14-core application processor for multimedia mobile applications, implemented in 40 nm, with a 222 mW H.264 full high-definition (full-HD) video engine, a 124 mW 40 M-polygons/s 3D/2D graphics engine, and a video/audio mu
Autor:
Nobuhiro Sato, Tomoki Watanabe, Moriyasu Banno, Hiroo Hayashi, Kazushige Oma, Takashi Miyamori, Jun Tanabe, Mayu Okumura, Yutaka Yamada, Tadakazu Nomura, Sano Toru, Manabu Nishiyama
Publikováno v:
ISSCC
Image recognition technologies have gained prominence in a variety of fields, such as automotive and surveillance, with dedicated image-recognition ICs being developed recently [1-2]. Image recognition ICs for an advanced driver assistance system (AD
Autor:
Kenichi Maeda, Masataka Matsui, Yasuhiro Taniguchi, Hiroaki Nakai, Takashi Miyamori, Tatsuo Kozakaya, Jun Tanabe, Yukimasa Miyamoto, Kenji Furukawa
Publikováno v:
Journal of Robotics and Mechatronics. 17:437-446
We developed an image recognition processor, “Visconti,” based on a configurable processor. Three VLIW processors that execute three instructions in parallel are integrated into a single chip with peripheral modules such as video I/Os and an SDRA
Autor:
Tomoo Yamakage, N. Matsumoto, T. Kitazawa, Shunichi Ishiwata, Takayoshi Shimazawa, Masataka Matsui, S. Michinaka, M. Saito, Hideki Takeda, Yoshiro Tsuboi, Takashi Miyamori, G. Ootomo, T. Kamei, A. Oue, K. Yahagi, T. Kodama
Publikováno v:
IEEE Journal of Solid-State Circuits. 38:530-540
A single-chip MPEG-2 MP@ML codec, integrating 3.8M gates on a 72-mm/sup 2/ die, is described. The codec employs a heterogeneous multiprocessor architecture in which six microprocessors with the same instruction set but different customization execute
Publikováno v:
ASP-DAC
New applications such as image recognition and augmented reality (AR) have become into practical on embedded systems. For these applications, we have developed a many-core SoC that includes two many-core clusters with 32 energy efficient processor co
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013.
Autor:
Takeshi Kodaka, Akira Takeda, Shunsuke Sasaki, Akira Yokosawa, Toshiki Kizu, Takahiro Tokuyoshi, Hui Xu, Toru Sano, Hiroyuki Usui, Jun Tanabe, Takashi Miyamori, Nobu Matsumoto
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013.
Autor:
Takashi Miyamori
Publikováno v:
The Japanese Journal of Rehabilitation Medicine. 33:540-543