Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Takashi Kawanami"'
Autor:
Masakazu Hioki, Chao Ma, Takashi Kawanami, Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 4, Iss 3, Pp 188-200 (2014)
Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories. One of the most importa
Externí odkaz:
https://doaj.org/article/31c22262843f4cc48558cc77573a0603
Autor:
Hiroki Yamazaki, Kohei Yamazaki, Rikiya Narita, Kyosuke Fukamachi, Susumu Sato, Takashi Kawanami
Publikováno v:
Journal of Global Tourism Research. 7:145-150
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::460e44886ed10ef0a6882d358b14dc68
https://doi.org/10.37020/jgtr.7.2_145
https://doi.org/10.37020/jgtr.7.2_145
Publikováno v:
Journal of Global Tourism Research. 3:25-30
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e131756dddeea70733513f2bbad36f2e
https://doi.org/10.37020/jgtr.3.1_25
https://doi.org/10.37020/jgtr.3.1_25
Publikováno v:
2019 Joint 8th International Conference on Informatics, Electronics & Vision (ICIEV) and 2019 3rd International Conference on Imaging, Vision & Pattern Recognition (icIVPR).
In this research, for the purpose of reducing cost and increasing penetration rate, insole type gait sensor has been proposed. The proposed method needs to be manufactured inexpensively in order to collect daily life gait information. Therefore, the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6eaebaefdf1e65cc4e7cc53e4467ae9a
https://doi.org/10.1109/iciev.2019.8858549
https://doi.org/10.1109/iciev.2019.8858549
Autor:
Chao Ma, Takashi Kawanami, Masakazu Hioki, Tadashi Nakagawa, Hanpei Koike, Toshiyuki Tsutsumi, Yasuhiro Ogasahara, Toshihiro Sekigawa
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 4, Iss 3, Pp 188-200 (2014)
Journal of Low Power Electronics and Applications
Volume 4
Issue 3
Pages 188-200
Journal of Low Power Electronics and Applications
Volume 4
Issue 3
Pages 188-200
Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories. One of the most importa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e96f79816f28652f2ae6efba466f1f2a
http://www.mdpi.com/2079-9268/4/3/188
http://www.mdpi.com/2079-9268/4/3/188
Autor:
Michitaka Kouno, Atsutoshi Matsuo, Teiji Okazaki, Keiichiro Tayama, Kiyonobu Yoshitake, Kumiko Wada, Yusuke Shintani, Kenichi Kosuga, Takashi Kawanami, Yuji Ogawa, Satoru Hida, Takahiro Mito
Publikováno v:
The Journal of Japanese College of Angiology. 54:61-65
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2494c6ebdddda9af502132b26a86e480
https://doi.org/10.7133/jca.13-00031
https://doi.org/10.7133/jca.13-00031
Autor:
Tadashi Nakagawa, Yohei Matsumoto, Toshihiro Sekigawa, Takashi Kawanami, Masakazu Hioki, Hanpei Koike, Toshiyuki Tsutsumi
Publikováno v:
ACM Transactions on Reconfigurable Technology and Systems. 1:1-31
A new method for improving the timing yield of field-programmable gate array (FPGA) devices affected by intrinsic within-die variation is proposed. The timing variation is reduced by selecting an appropriate configuration for each chip from a set of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e12fd1eaef1aa58292e8deef305e1f62
https://doi.org/10.1145/1331897.1331899
https://doi.org/10.1145/1331897.1331899
Autor:
Toshiyuki Tsutsumi, Masakazu Hioki, Takashi Kawanami, Toshihiro Sekigawa, Hanpei Koike, Tadashi Nakagawa, Yohei Matsumoto
Publikováno v:
IEICE Transactions on Information and Systems. :1947-1955
This paper describes a new design concept, the Body Bias Voltage Set (BBVS), and presents the effect of the BBVS on static power, operating speed, and area overhead in an FPGA with field-programmable Vth components. A Flex Power FPGA is an FPGA archi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1047e4189f2b0e4006c2eea11e2fd288
https://doi.org/10.1093/ietisy/e90-d.12.1947
https://doi.org/10.1093/ietisy/e90-d.12.1947
Publikováno v:
Systems and Computers in Japan. 33:68-77
In the dataflow machine, it is important to avoid degradation of performance in sequential processing, and it is important from the viewpoint of hardware scale to reduce the number of waiting operands. This paper demonstrates that processing performa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5bb8fc26595dd9cb253a2724850e275d
https://doi.org/10.1002/scj.1153
https://doi.org/10.1002/scj.1153
Autor:
Toshihiro Sekigawa, Chao Ma, Masakazu Hioki, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Yasuhiro Ogasahara, Takashi Kawanami
Publikováno v:
2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
Flex Power FPGA uses body biasing technique to implement the fine-grained threshold voltage (Vt) programmability in the FPGA. Low-Vt state can be assigned only to the component circuits along the critical path of the application design mapped on the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f3f575695398d7cc0f16cef098f7904
https://doi.org/10.1109/s3s.2013.6716541
https://doi.org/10.1109/s3s.2013.6716541