Zobrazeno 1 - 10
of 58
pro vyhledávání: '"Takashi Ipposhi"'
Publikováno v:
2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD).
The introduction of a recessed gate into a shallow trench isolation (STI) section used as an insulating film in a drift region of an nLDMOSFET is a well-known means of improving the trade-off between the on-resistance (R sp ) and the off-state breakd
Publikováno v:
2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD).
In this paper, we propose a Split-Recessed-Gate LDMOS (SRG-LDMOS) which minimizes HCl degradation with negligible increase in specific on-resistance. In SRG-LDMOS structure, the gate poly is split into two parts, the primal gate on the channel and th
Autor:
Shunji Kubo, Tomohiro Yamashita, Shigeki Nishimoto, Takahiro Mori, Hiroki Fujii, Yoshiki Maruyama, Takahiro Maruyama, Shigeo Tokumitsu, Hiroyuki Arie, Takashi Ipposhi, Takuya Maruyama
Publikováno v:
2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD).
This paper proposes a 90nm bulk BiCDMOS platform for automotive applications. In this platform, two types of characteristic deep trench isolations are introduced. One has a top-to-bottom air-gap which serves as a stable isolator against high voltage.
Publikováno v:
2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD).
This paper proposes a partially recessed-gate structure which enables to enlarge HCI lifetime of an STI-based LDMOSFET without degrading important static performances such as breakdown voltage (BV) and specific on-resistance (Rsp). This improvement i
Publikováno v:
IEICE Electronics Express. 6:456-460
Autor:
Yusuke Morita, Ryuta Tsuchiya, Takashi Ishigaki, Y. Inoue, Shinichiro Kimura, Toshiaki Iwamatsu, Takashi Ipposhi, Nobuyuki Sugii, Toshiro Hiramoto
Publikováno v:
Japanese Journal of Applied Physics. 47:2585-2588
A fully depleted silicon-on-insulator (FD SOI) device having an ultrathin buried oxide (BOX) with a 45-nm fully silicided (FUSI) NiSi gate, and a hybrid SOI/bulk complementary metal oxide semiconductor (CMOS) integration process have been developed.
Autor:
Mikio Tsujiuchi, Makoto Yabuuchi, Takashi Ipposhi, Yuuichi Hirano, Koji Nii, Yasumasa Tsukamoto, Takashi Terada, Kozo Ishikawa, Yukio Maki, Shigeki Obayashi, Katsumi Eikyu, Toshiaki Iwamatsu, Yasuo Inoue, Hirofumi Shinohara, T. Uchida, Hidekazu Oda
Publikováno v:
Japanese Journal of Applied Physics. 47:2092-2096
This paper presents that advanced actively body-bias controlled (Advanced ABC) technology contributes to enhancing operation margins of static random access memory (SRAM). For the first time, significant enhancement of static noise margin (SNM) is su
Autor:
Toshiaki Iwamatsu, Shigeto Maegawa, Y. Inoue, Yukio Maki, Yasumasa Tsukamoto, A. Miyanishi, Yuichiro Ishii, Hidekazu Oda, Yuuichi Hirano, Koji Nii, Mikio Tsujiuchi, Takashi Ipposhi
Publikováno v:
IEEE Transactions on Electron Devices. 55:365-371
An actively body-bias controlled (ABC) silicon-on-insulator (SOI) static random access memory (SRAM) connecting the bodies of the access and the driver transistors with the word line is proposed to realize high-speed and low-voltage operation. We dev
Autor:
Toshiaki Iwamatsu, Takashi Ipposhi, Genichi Tanaka, Masaaki Iijima, Hiromi Notani, Akira Tada, Masayuki Terai, Masahiro Numa
Publikováno v:
IEICE Electronics Express. 5:354-360
Crosstalk repair by gate sizing often increases the noise on adjacent wires, and results in cyclical iterations of noise repair. We propose a Delayed Actively Body-bias Controlled (D-ABC) SOI scheme for crosstalk noise repair by providing delayed for
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :2691-2694
Instability of SRAM memory cells derived from aggressive technology scaling has been recently one of the most significant issues. Although a 7T-SRAM cell with an area-tolerable separated read port improves read margins even at sub-1V, it unfortunatel