Zobrazeno 1 - 10
of 89
pro vyhledávání: '"Takashi Imagawa"'
Publikováno v:
IPSJ Transactions on System and LSI Design Methodology. 16:35-44
Autor:
Masanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi
Publikováno v:
Japanese Journal of Applied Physics. 61
We are developing field-programmable gate arrays (FPGAs) with a new non-volatile switch called via-switch. In via-switch FPGAs (VS-FPGAs), the via-switches required for reconfiguration are placed in the routing layer so that the entire transistor lay
Autor:
Ryouji Mizumachi, Yuuya Ono, Tomoyuki Hisa, Yoshitaka Furuya, Novriana Dewi, Hiroyuki Takahashi, Jun Nakajima, Tadao Nakashima, Masashi Nagata, Minoru Ono, Yasumasa Nonaka, Toshimitsu Terao, Yasuyuki Morishita, Takashi Fujino, Masashi Yanagawa, Koji Seguchi, Mitsuteru Fujihara, Masazumi Eriguchi, Kazuhiko Arimori, Kazuhiro Kakimi, Takeshi Nagasaki, Takumichi Sugihara, Hironobu Yanagie, Shushi Higashi, Yuuji Murata, Ichiro Ikushima, Takashi Imagawa
Publikováno v:
In Vivo
Background/aim A mixture of anticancer agents and iodized poppy seed oil (IPSO) has been widely used for intra-arterial chemotherapy of hepatocellular carcinoma. However, the anticancer agents can easily separate from IPSO, so the therapeutic potenti
Autor:
Masanori Hashimoto, Tetsuaki Fujimoto, Takashi Kishimoto, Hiroyuki Ochi, Takashi Imagawa, Toshiki Higashi, Wataru Takahashi, Tadahiko Sugibayashi, Yukio Mitsuyama, Kazutoshi Wakabayashi, Kosei Yamaguchi, Munehiro Tada, Jaehoon Yu, Hidetoshi Onodera, Ryutaro Doi, Junshi Hotate
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26:2723-2736
This paper proposes a highly dense reconfigurable architecture that introduces via-switch device, which is a nonvolatile resistive-change switch and is used in crossbar switches. Via-switch is implemented in back-end-of-line layers only, and hence th
Publikováno v:
DATE
This paper proposes a technology mapping algorithm for implementing application circuits on via-switch FPGA (VS-FPGA). The via-switch is a novel non-volatile and rewritable memory element. Its small footprint and low parasitic RC are expected to impr
Autor:
Jaehoon Yu, Yukio Mitsuyama, Naoki Banno, Ryutaro Doi, Bai Xu, Munehiro Tada, Toshitsugu Sakamoto, Hirovuki Ochi, Tadahiko Suuibayashi, Takashi Imagawa, Yusuke Araki, Masanori Hashimoto, Kazutoshi Wakabayashi, Hidetoshi Onodera
Publikováno v:
ISSCC
FPGAs are a suitable platform for implementing up-to-date machine learning algorithms and state-of-the-art AI applications including inference engines in embedded systems and training accelerators in cloud systems. Despite its short design turn-aroun
Publikováno v:
IEICE Transactions on Electronics. (7):741-750
Time redundancy is sometimes an only option for enhancing circuit reliability when the circuit area is severely restricted. In this paper, a time-redundant error-correction scheme, which is particularly suitable for coarse-grained reconfigurable arra
Autor:
HIRONOBU YANAGIE, TAKASHI FUJINO, MASASHI YANAGAWA, TOSHIMITSU TERAO, TAKASHI IMAGAWA, MITSUTERU FUJIHARA, YASUYUKI MORISHITA, RYOUJI MIZUMACHI, YUUJI MURATA, NOVRIANA DEWI, YUUYA ONO, ICHIRO IKUSHIMA, KOJI SEGUCHI, MASASHI NAGATA, YASUMASA NONAKA, YOSHITAKA FURUYA, TOMOYUKI HISA, TAKESHI NAGASAKI, KAZUHIKO ARIMORI, TADAO NAKASHIMA
Publikováno v:
In Vivo; Jan/Feb2021, Vol. 35 Issue 1, p239-248, 10p
Publikováno v:
SoCC
In this paper, we describe a Selectable Grained Reconfigurable Architecture (SGRA) in which each Configurable Logic Block can be configured to operate in either fine-grained or coarse-grained mode. Compared with the Mixed Grained Reconfigurable Archi
Publikováno v:
ISCIT
The developed system has achieved the data rate of 3Gbps by use of an 80-MHz baseband bandwidth and a 8×8 MIMO-OFDM scheme. This paper describes the VLSI implementation of the 8×8 MIMO-OFDM system. A low-latency and the optimum pipelined architectu