Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Takahiro Notsu"'
Publikováno v:
DSD
We describe a framework for automated generation of hybrid processor/accelerator systems comprising a RISC-V processor, and a coarse-grained reconfigurable array (CGRA) for realizing compute-kernel acceleration. CGRAs are programmable hardware platfo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc22ac1e1d900a71cea0fa7e5c9ca9ae
https://doi.org/10.1109/dsd53832.2021.00015
https://doi.org/10.1109/dsd53832.2021.00015
Autor:
Takahiro Notsu, Naoki Hamada, Yasufumi Sakai, Toshihiko Mori, Teruo Ishihara, Atsuki Inoue, Yukito Tsunoda
Publikováno v:
GECCO (Companion)
When applying genetic algorithms (GAs) in the design real products, reducing the computational cost of fitness functions is one of the major challenges. In some cases, the computational cost of calculating specific eigenvalues is a predominant factor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b95e37f37ee99099ed12165cd7b916a9
https://doi.org/10.1145/3319619.3321884
https://doi.org/10.1145/3319619.3321884
Autor:
Takahiro Notsu, Seiya Akaki, Ryota Shioya, Teruo Ishihara, Shuichi Sakai, Yutaro Bessho, Katsuhiro Yoda, Akifumi Fukuda, Toru Koizumi, Hidetsugu Irie, Satoshi Nakae
Publikováno v:
MICRO
The single-thread performance of a processor improves the capability of the entire system by reducing the critical path latency of programs. Typically, conventional superscalar processors improve this performance by introducing out-of-order (OoO) exe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::994f8b60fa75d83fc227510e45219582
https://doi.org/10.1109/micro.2018.00019
https://doi.org/10.1109/micro.2018.00019