Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Takaaki Nedachi"'
Autor:
Kenji Mizutani, Yasuhiko Hagihara, Akio Ukita, Takaaki Nedachi, Junichi Fujikata, Masataka Noguchi, Daisuke Okamoto, Keizo Kinoshita, Hiroshi Yamaguchi, Mitsuru Kurihara, Tsuyoshi Horikawa, Takahiro Nakamura, Yasuyuki Suzuki, Yasuhiro Ibusuki, Jun Ushida, Takanori Shimizu, Koichi Takemura, Junichi Tsuchida, Kenichiro Yashiki, Masatoshi Tokushima, Kazuhiko Kurata
Publikováno v:
IEICE Transactions on Electronics. :333-339
Autor:
Junichi Tsuchida, Masatoshi Tokushima, Takaaki Nedachi, Kazuhiko Kurata, Yasuhiko Hagihara, Jun Inasaka, Kenichiro Yashiki, Yasuyuki Suzuki, Mitsuru Kurihara, Junichi Fujikata, Daisuke Okamoto
Publikováno v:
Journal of Lightwave Technology. 34:2988-2995
We have developed a 5 × 5 mm2 compact silicon-photonic receiver with a 28-nm CMOS transimpedance-amplifier (TIA) chip. The receiver chip was designed using a photonics—electronics convergence design technique for the realization of high-speed and
Autor:
Ichiro Ogura, Koichi Takemura, Masatoshi Tokushima, Jun Inasaka, Yasuhiko Hagihara, Makoto Fushimi, Yasuyuki Suzuki, Takaaki Nedachi, Junichi Tsuchida, Kenichiro Yashiki, Makoto Okano, Toshinori Uemura, Jun Ushida, Shigeki Takahashi, Kazuhiko Kurata, Akio Ukita, Daisuke Okamoto, Mitsuru Kurihara, Junichi Fujikata, Takanori Shimizu
Publikováno v:
OFC
We developed 5 mm square Si-photonics-based chip-scale optical transmitters/receivers called “optical I/O cores”. The power consumption of their hybrid-integrated ICs is 5 mW/Gbps. We demonstrated 25-Gbps/ch error-free operation over 300-m MMF in
Autor:
M. Sugawara, Kouichi Yamaguchi, Makoto Takamiya, Kazuhisa Sunaga, Koichi Nose, Muneo Fukaishi, Yoshihiro Nakagawa, Takaaki Nedachi, Shunichi Kaeriyama
Publikováno v:
ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..
A backplane transceiver in 90 nm CMOS that employs duobinary signaling over copper traces is described. To introduce duobinary signaling into data transfers on printed boards, three techniques are developed: 1) edge equalization for equalizer adaptat
Autor:
S. Naramoto, Muneo Fukaishi, M. Arai, Hiroshi Yamaguchi, M. Kurisu, T. Sato, T. Tanahashi, S. Tomari, T. Matsuzaki, Takaaki Nedachi, K. Nakamura
Publikováno v:
2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
A 20-data-channel transceiver with a control channel allows uncoded data transfer with 13 ns latency. A digital DLL with a ring-interpolator tracks phase with 20 ps resolution. A pre-emphasis driver enables 2 Gb/s transmission per channel over a 7 m