Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Taehun Yoon"'
Autor:
Kyeongha Kwon, Woohyun Kwon, Jong-Hyeok Yoon, Hyeon-Min Bae, Jaehyeok Yang, Taehun Yoon, Sejun Jeon
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:2825-2835
A 20 Gb/s serial link transceiver employing a framed-pulsewidth modulation (FPWM) scheme that overcomes the signal-to-noise (SNR) degradation without a linearity requirement is presented. The FPWM scheme encodes data at the location and the width of
Autor:
Byoung-Joo Yoo, Lee Jae-Chol, Jongshin Shin, Dong-Ho Choi, Sanghune Park, Sang-Hyeok Chu, Michael Choi, Hyonguk Pang, Woo-chul Jung, Kim Bongkyu, Taehun Yoon, Hye-yeon Yang, Kang Gun-Il, Dong-Hyuk Lim, Seung-Yeob Baek, Naxin Kim, Kang-Jik Kim, Young-Ho Choi, Lee June-Hee
Publikováno v:
ISSCC
Needs for I/O bandwidth have rapidly increased with the explosive growth of internet traffic and data technologies. To accommodate the required high bandwidth, a DSP-based PAM-4 transceiver became the most robust solution with increased usage of chan
Autor:
Jinho Park, Sangeun Lee, Taehun Yoon, Joon-Yeong Lee, Hyeon-Min Bae, Kwangseok Han, Hyosup Won
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 64:664-674
This paper describes a 28-Gb/s receiver IC with self-contained adaptive equalization and sampling point control using an on-chip stochastic sigma-tracking eye-opening monitor (SSEOM). The proposed SSEOM accurately detects the bit-error-rate (BER)-rel
Autor:
Taehun Yoon, Sangeun Lee, Hyo Sup Won, Taeho Kim, Jinho Han, Jin-Hee Lee, Joon-Yeong Lee, Hyeon-Min Bae, Kwangseok Han, Jinho Park, Jeongsup Lee
Publikováno v:
IEEE Journal of Solid-State Circuits. 52:688-703
This paper presents the first 103.125-Gb/s multilink gearbox (MLG) IC, which facilitates the transport of independent 10and 40-GbE signals to 4 × 25.78 Gb/s physical layers, such as 100GBASE-xR4. The IC consumes only 1.37 W while implementing compli
Autor:
Jeongsup Lee, Taehun Yoon, Hyeon-Min Bae, Kwangseok Han, Sangeun Lee, Joon-Yeong Lee, Taeho Kim, Jinho Park
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:2475-2484
A phase interpolator (PI)-based $10\times 10$ Gb/s bootstrap transceiver for referenceless and lane-independent operation is presented. PI output clock signals phase locked to the input data are used as reference clock signals for frequency locking t
Autor:
Soon-Won Kwon, Taeho Kim, Hyeon-Min Bae, Kwangseok Han, Sangeun Lee, Taehun Yoon, Joon-Yeong Lee, Jinho Park, Jin-Hee Lee, Hyosup Won, Jeongsup Lee
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:2817-2828
An automatic loop gain control algorithm (ALGC) for a bang-bang (BB) clock and data recovery (CDR) is proposed. The proposed algorithm finds the optimum loop gain using the autocorrelation of a BBPD output signal for minimum MSE performance. Mathemat
Autor:
Hyeon-Min Bae, Jong-Hyeok Yoon, Jaehyeok Yang, Woohyun Kwon, Sejun Jeon, Kyeongha Kwon, Taehun Yoon
Publikováno v:
ISSCC
Expanding signal bandwidths in high-speed links is increasing intersymbol interference (ISI), which necessitates the enhancement of spectral efficiency. Recently, various modulation schemes including pulse amplitude modulation (PAM) [1], pulsewidth m
Publikováno v:
Solar Energy Materials and Solar Cells. 93:783-788
In this study, nanoparticle-based approach was suggested for the formation of CuInSe 2 (CIS) layer. Nanoparticles with core–shell structure were used as the precursor material, and binary phases were used as core and shell material in the core–sh
Autor:
Taehun Yoon, Sangeun Lee, Joon-Yeong Lee, Jinho Park, Taeho Kim, Jeongsup Lee, Hyeon-Min Bae, Kwangseok Han
Publikováno v:
CICC
A phase interpolator (PI)-based 10 × 10 Gb/s bootstrap transceiver for reference-less and lane-independent operation is presented. PI output clock signals that are phase locked to the input data are used for the voltage-controlled oscillator (VCO) f
Autor:
Sangeun Lee, Joon-Yeong Lee, Taeho Kim, Jinho Park, Hyeon-Min Bae, Kwangseok Han, Taehun Yoon, Hyosup Won, Jeongsup Lee
Publikováno v:
VLSIC
This paper presents the industry's first low-power 100-Gigabit Ethernet (GbE) multi-link gearbox (MLG) IC, which facilitates transport of independent 10-GbE and 40-GbE signals to 4×25G physical layers implementing 100GBASE-R. The IC consumes only 1.