Zobrazeno 1 - 10
of 37
pro vyhledávání: '"Taegeun Yoo"'
Autor:
Ju Eon Kim, Taegeun Yoo, Dong-Kyu Jung, Dong-Hyun Yoon, Kiho Seong, Tony Tae-Hyoung Kim, Kwang-Hyun Baek
Publikováno v:
IEEE Access, Vol 8, Pp 101359-101368 (2020)
In this paper, a low power asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) involving the process, voltage, and temperature (PVT) compensation is presented. A proposed adaptive conversion time detection-and-contr
Externí odkaz:
https://doaj.org/article/408a85f4782d4a5696a6078ff566fd49
Publikováno v:
IEEE Journal of Solid-State Circuits. 57:3466-3476
In this work, we present a novel 8T static random access memory (SRAM)-based compute-in-memory (CIM) macro for processing neural networks with high energy efficiency. The proposed 8T bitcell is free from disturb issues thanks to the decoupled read ch
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 69:2542-2552
Publikováno v:
IEEE Journal of Solid-State Circuits. 56:2221-2233
This article (Colonnade) presents a fully digital bit-serial compute-in-memory (CIM) macro. The digital CIM macro is designed for processing neural networks with reconfigurable 1–16 bit input and weight precisions based on bit-serial computing arch
Autor:
Taegeun Yoo, Hyunjoon Kim, Kevin Chai Tshun Chuan, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 68:667-679
A novel 4T2C ternary embedded DRAM (eDRAM) cell is proposed for computing a vector-matrix multiplication in the memory array. The proposed eDRAM-based compute-in-memory (CIM) architecture addresses a well-known Von Neumann bottle-neck in the traditio
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:1909-1919
Gesture recognition has increasingly become one of the most popular human–machine interaction techniques for smart devices. Existing gesture recognition systems suffer from either excessive power consumption or large size, limiting their applicatio
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:1345-1356
This article presents an 8T static random access memory (SRAM) macro with vertical read wordline (RWL) and selective dual split power (SDSP) lines techniques. The proposed vertical RWL reduces dynamic energy consumption during read operation by charg
Autor:
Loi Van Le, Sharma Ruchi, M. Sultan M. Siddiqui, Tony Tae-Hyoung Kim, Taegeun Yoo, Ik Joon Chang
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 20:468-474
In Space applications, the scaling of transistors has made integrated circuits (ICs) more susceptible to soft errors, caused by radiation strikes. When a soft error causes a bit flip in a memory device, this event is referred to as a Single Event Ups
Publikováno v:
Electronics Letters. 55:1273-1275
This Letter proposes a balanced sampling switch technique for achieving high linearity and a wide temperature range. The proposed technique reduces the V DS of the NMOS sampling switch for reducing the leakage current through the switch during the ho
Publikováno v:
IEEE Solid-State Circuits Letters. 2:123-126