Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Tae-Hum Yang"'
Autor:
Jin-Yong Jung, Ramchan Woo, Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo, Tae-Hum Yang, Se-Jeong Park, Jeong-Su Kim
Publikováno v:
IEEE Journal of Solid-State Circuits. 37:612-623
Recently, the level of realism in PC graphics applications has been approaching that of high-end graphics workstations, necessitating a more sophisticated texture data cache memory to overcome the finite bandwidth of the AGP or PCI bus. This paper pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::351ff5ca3c98dc8dd68e0f561f665488
https://doi.org/10.1109/4.997855
https://doi.org/10.1109/4.997855
Autor:
Hoi-Jun Yoo, Ramchan Woo, Se-Jeong Park, Se-Joong Lee, Jeong-Su Kim, Jin-Yong Jung, Tae-Hum Yang, Kangmin Lee
Publikováno v:
2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).
A dedicated single-chip multilevel parallel graphics cache memory for high-speed parallel texture mapping in PC graphics has been fabricated by a 0.16 /spl mu/m DRAM technology. The proposed cache architecture is composed of four components: 1) an 8
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ecd1a232800b7296cec1ac1c54ecebe
https://doi.org/10.1109/vlsic.2001.934250
https://doi.org/10.1109/vlsic.2001.934250
Autor:
Se-Jeong Park, Jeong-Su Kim, Ramchan Woo, Se-Joong Lee, Kang-Min Lee, Tae-Hum Yang, Jin-Yong Jung, Hoi-Jun Yoo
Publikováno v:
2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185); 2001, p233-236, 4p
Autor:
Se-Jeong Park, Jeong-Su Kim, Ramchan Woo, Se-Joong Lee, Kang-Min Lee, Tae-Hum Yang, Jin-Yong Jung, Hoi-Jun Yoo
Publikováno v:
IEEE Journal of Solid-State Circuits; May2002, Vol. 37 Issue 5, p612-623, 12p