Zobrazeno 1 - 10
of 79
pro vyhledávání: '"Tadahiko Sugibayashi"'
Autor:
Xu BAI, Ryusuke NEBASHI, Makoto MIYAMURA, Kazunori FUNAHASHI, Naoki BANNO, Koichiro OKAMOTO, Hideaki NUMATA, Noriyuki IGUCHI, Tadahiko SUGIBAYASHI, Toshitsugu SAKAMOTO, Munehiro TADA
Publikováno v:
IEICE Transactions on Electronics. :627-630
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e4fa74ec46c2aae54e6d7201acec8c8
https://doi.org/10.1587/transele.2021fus0005
https://doi.org/10.1587/transele.2021fus0005
Autor:
Naoki Banno, Hideaki Numata, Koichiro Okamoto, Ryusuke Nebashi, Tadahiko Sugibayashi, Noriyuki Iguchi, Masanori Hashimoto, Bai Xu, Makoto Miyamura, Munehiro Tada, Toshitsugu Sakamoto
Publikováno v:
IEEE Journal of Solid-State Circuits. 57:2250-2262
Offering a combination of low latency, high energy-efficiency, and flexibility, field-programmable gate arrays (FPGAs) suit applications ranging from Internet of Things (IoT) computing to artificial intelligence (AI). The conventional static random a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ddc8a3ff8c9b7f118b1c11e89d2a9d4b
https://doi.org/10.1109/jssc.2021.3117260
https://doi.org/10.1109/jssc.2021.3117260
Autor:
Masanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi
Publikováno v:
Japanese Journal of Applied Physics. 61
We are developing field-programmable gate arrays (FPGAs) with a new non-volatile switch called via-switch. In via-switch FPGAs (VS-FPGAs), the via-switches required for reconfiguration are placed in the routing layer so that the entire transistor lay
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3c5031418eed8c7d088bc9725d64396d
http://hdl.handle.net/2433/282783
http://hdl.handle.net/2433/282783
Autor:
Hiroyuki Ochi, Masanori Hashimoto, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada, K. Okamoto, Noriyuki Iguchi, Naoki Banno, Hidetoshi Onodera
Publikováno v:
IEEE Transactions on Electron Devices. 66:3331-3336
A nonvolatile and programmable routing switch featuring two-varistor selected complementary atom switch (2V-1CAS also known as via-switch) is evaluated. The a-Si/SiN/a-Si varistor as a selector for the atom switch shows superior nonlinear current–v
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3be2390947c75834fdf6774ff175ca34
https://doi.org/10.1109/ted.2019.2922352
https://doi.org/10.1109/ted.2019.2922352
Autor:
Masanori Hashimoto, Tetsuaki Fujimoto, Takashi Kishimoto, Hiroyuki Ochi, Takashi Imagawa, Toshiki Higashi, Wataru Takahashi, Tadahiko Sugibayashi, Yukio Mitsuyama, Kazutoshi Wakabayashi, Kosei Yamaguchi, Munehiro Tada, Jaehoon Yu, Hidetoshi Onodera, Ryutaro Doi, Junshi Hotate
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26:2723-2736
This paper proposes a highly dense reconfigurable architecture that introduces via-switch device, which is a nonvolatile resistive-change switch and is used in crossbar switches. Via-switch is implemented in back-end-of-line layers only, and hence th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::17f009f9d0c662bed8fa1b8b167b3818
https://doi.org/10.1109/tvlsi.2018.2812914
https://doi.org/10.1109/tvlsi.2018.2812914
Autor:
Takashi Takenaka, Masanori Hashimoto, Hidetoshi Onodera, Hiromitsu Hada, Munehiro Tada, Toshitsugu Sakamoto, Kazutoshi Wakabayashi, Makoto Miyamura, Akira Iwasaki, Hiroyuki Ochi, Hiroyuki Kanbara, Hiroki Hihara, Yukio Mitsuyama, Tadahiko Sugibayashi
Publikováno v:
IEEE Embedded Systems Letters. 10:119-122
This letter describes a newly established design framework with the layered architecture of processing elements (PEs) exploiting high-level synthesis and its evaluation results. The design framework was developed for intelligent sensor nodes of Inter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb69a1c761271a003f7138deca3b0ba8
https://doi.org/10.1109/les.2018.2797064
https://doi.org/10.1109/les.2018.2797064
Autor:
Munehiro Tada, Bai Xu, Ryusuke Nebashi, Toshitsugu Sakamoto, Kazunori Funahashi, Noriyuki Iguchi, Tadahiko Sugibayashi, Naoki Banno, Makoto Miyamura, K. Okamoto, Hideaki Numata
Publikováno v:
FPL
A nonvolatile FPGA using atom-switch crossbars is implemented in a 28nm CMOS. The depopulated atom-switch crossbar with double-gate layout achieves 75% area saving. The routability degradation due to the depopulation is mitigated by a modified routin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::43055bbd9508f1e708dc737311a33872
https://doi.org/10.1109/fpl50879.2020.00060
https://doi.org/10.1109/fpl50879.2020.00060
Autor:
Ryusuke Nebashi, K. Okamoto, Munehiro Tada, Masanori Hashimoto, Naoki Banno, Bai Xu, Toshitsugu Sakamoto, Tadahiko Sugibayashi, Noriyuki Iguchi, Hideaki Numata, Makoto Miyamura
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
1.5x energy-efficient and 1.4x operation-speed, nonvolatile via-switch (VS) FPGA with atom switch and a-Si/SiN/a-Si varistor is demonstrated in a 65nm-node for various basic applications. For rapid and low-cost migration from VS-FPGA to ASIC, “hard
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f444bda96ef9835e128157c614b3d22
https://doi.org/10.1109/vlsitechnology18217.2020.9265046
https://doi.org/10.1109/vlsitechnology18217.2020.9265046
Autor:
Bai Xu, Hiromitsu Hada, Ryusuke Nebashi, Noriyuki Iguchi, Kazunori Funahashi, Makoto Miyamura, K. Okamoto, Toshitsugu Sakamoto, Hideaki Numata, Naoki Banno, Tadahiko Sugibayashi, Munehiro Tada
Publikováno v:
IRPS
An ON-state retention of a 40nm-node atom switch embedded nonvolatile memory (eNVM) has been carefully investigated for IoT/AI inference solution. Based on ON-conductance (G on ) tuning model of atom switch, one order of magnitude lower programming p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::46e24c09f6a889696528d6fa1f33761b
https://doi.org/10.1109/irps45951.2020.9128967
https://doi.org/10.1109/irps45951.2020.9128967
Autor:
Noriyuki Iguchi, Masanori Hashimoto, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada, Hideaki Numata, Hiromitsu Hada, K. Okamoto, Naoki Banno
Publikováno v:
2019 Silicon Nanoelectronics Workshop (SNW).
Sputter deposited Ge x Se 1−x films are characterized, prior to device fabrication for a selector. A Se-rich film has GeSe 4/2 tetrahedral structure and higher crystallization temperature than Ge-rich films. Printed Ag-paste electrodes are used for
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3826f2ca41f2d096a0b993e47d148454
https://doi.org/10.23919/snw.2019.8782960
https://doi.org/10.23919/snw.2019.8782960