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A 100 nm copper/low-k bulk CMOS technology with multi Vt and multi gate oxide integrated transistors for low standby power, high performance and RF/analog system on chip applications

Autor: D. Dyer, D. Wristers, P. Ingersoll, Karl Wimmer, R. Stout, John R. Alvis, Yongjoo Jeon, P. Grudowski, J. Conner, D. Bonser, P. Abramowitz, T.V. Gompel, J. Pellerin, J.J. Lee, A. Duvallet, M. Foisy, K. Hellig, S. Lim, D. Hall, L. Vishnubhotla, S. Parihar, A. Nghiem, G.C.-F. Yeap, Kyle Patterson, W. Qi, M. Rendon, Yang Du, Y. Shiho, J. Chen, S. Jallepalli, Marilyn Irene Wright, K. Weidemann, M. Woo, David Burnett, T. Luo, Craig S. Lage, R. Singh, C. Reddy, M. Hall, H.-H. Tseng, S. Veeraraghavan, N. Benavides, N. Ramani

Publikováno v: Scopus-Elsevier

We report a 100 nm modular bulk CMOS technology platform with multi Vt and multi gate oxide integrated transistors that enables device and circuit co-design (M. Fukuma et al., VLSI Tech., 2000) techniques (e.g. well biasing and power down/reduction)

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