Zobrazeno 1 - 10
of 46
pro vyhledávání: '"T.N. Prabakar"'
Autor:
K. Aanandha Saravanan, S. Ramkumar, M. Revathy, K. Mohanthi, T.N. Prabakar, Venugopal, G.V. Raja
Publikováno v:
Measurement: Sensors, Vol 24, Iss , Pp 100586- (2022)
Generally, it is projected that a combination of automated and manually vehicles would be core of the intellectual transportation scheme. As a result, resolving the unsafe conditions raised by such a combination of automated and manually cars are cri
Externí odkaz:
https://doaj.org/article/57bcd473554249468d8791da9a632624
Akademický článek
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Publikováno v:
EST
In this paper, design of a novel Network on Chip (NoC) structure and its integration with Reliable Reconfigurable Real Time Operating System (R3TOS) are presented. NoC has been recently identified as a scalable communication paradigm to avoid the com
Autor:
Saurav Sarkar, T.N. Prabakar, Seetharaman Gopalakrishnan, N Poomima, Arslan Tughrul, M. Santhi
Publikováno v:
AHS
In this paper, design of a novel reliable Application Specific Network on Chip (ASNoC) with reconfigurability and its integration with Reliable Reconfigurable Real Time Operating System (R3TOS) is presented. Network on Chip (NoC) is a well known scal
Publikováno v:
Applied Mechanics and Materials. :1179-1183
In this paper, design and implementation of SOPC (System on Programmable Chip) based Asynchronous pipelined Discrete Cosine Transform (DCT) is considered. For designing Asynchronous Pipelined DCT, a new approach is proposed. In this approach, Nios II
Autor:
T.N. Prabakar, G. Lakshminarayanan
Publikováno v:
International Journal of Computer Applications. 4:32-37
In a clause of combinational circuits, the throughput can be increased, without (wave) pipelining, by introducing data dependent delay feature thus avoiding the worst case delay. That is, in circuits like multipliers and adders which are the basic bu
Publikováno v:
International Journal of Computer Applications. 3:21-27
In this paper, design and FPGA (Field Programmable Gate Array) implementation of embedded system for time based IDEA encryption is presented. Presently available encryption systems, suffer from Brute Force attack in which all key combinations are tri
Publikováno v:
International Journal of Computer Applications. 1:24-29
In a clause of combinational circuits, the throughput can be increased, without (wave) pipelining, by introducing data dependent delay feature thus avoiding the worst case delay. That is, in circuits like multipliers and adders which are the basic bu
Akademický článek
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Autor:
S. Hariprasath, T.N. Prabakar
Publikováno v:
2014 International Conference on Communication and Signal Processing.
A Biometric system is essentially a pattern recognition system that makes use of biometric traits to recognize individuals. Authentication systems built on only one biometric modality may not fulfill the requirements of demanding applications in term