Zobrazeno 1 - 6
of 6
pro vyhledávání: '"T.M. Lalumia"'
Publikováno v:
ICASSP
A programmable VLSI processor is described for efficiently computing a variety of kernel operations for speech recognition. These operations include dynamic programming for isolated and connected word recognition using both the template matching appr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::435e7857348c82a8b3a2f13fcef11b68
https://doi.org/10.1109/icassp.1987.1169691
https://doi.org/10.1109/icassp.1987.1169691
Autor:
T. Koh, N.L. Gottfried, G.A. Wilson, R.B. Blake, J. Kumar, C.M. Gervershi, R. Crochiere, W.R. McDonald, M.R. Dwarakanath, O.E. Agazzi, R.A. Wilson, D.R. Cassiday, S.S. Haider, T.M. Lalumia, R.W. Walden, R.F. Shaw, Nallepilli S. Ramesh, M.L. Heisakanen
Publikováno v:
ICASSP
The authors discuss major issues related to algorithms and architecture of the transceiver system and be the signal processor that they designed and implemented in a single VLSI chip. The functions of each block are described in the context of the ov
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::48bfdc90ce0ea76b886e60113aed0d7d
https://doi.org/10.1109/icassp.1989.266967
https://doi.org/10.1109/icassp.1989.266967
Publikováno v:
Proceedings of the IEEE. 75:1172-1184
A programmable VLSI architecture is described for efficiently computing a variety of kernel operations for speech recognition. These operations include dynamic programming for isolated and connected word recognition using both the template matching a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6e31901f5d023b97b18ddbc4b38bf77a
https://doi.org/10.1109/proc.1987.13870
https://doi.org/10.1109/proc.1987.13870
Autor:
N.L. Gottfried, G.A. Wilson, C.M. Gerveshi, S.S. Haider, R.W. Walden, R.A. Wilson, D.R. Cassiday, R. Crochiere, J. Kumar, T.M. Lalumia, R.F. Shaw, O.E. Agazzi, Nallepilli S. Ramesh, T. Koh, W.R. McDonald, R.B. Blake
Publikováno v:
IEEE Journal of Solid-State Circuits. 24:1605-1613
The digital signal processing chip of a two-chip ISDN (integrated services digital network) basic access transceiver based on the ANSI standard 2B1Q code is described. Nonlinear echo cancellation is used to improve the loop coverage. The chip feature
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0957f7d598f0a028ba92f33fa29252e0
https://doi.org/10.1109/4.44996
https://doi.org/10.1109/4.44996
Akademický článek
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Conference
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