Zobrazeno 1 - 10
of 31
pro vyhledávání: '"T. Roggenbauer"'
Autor:
Ivan Puchades, T. Roggenbauer, Vishnu K. Khemka, Ronghua Zhu, M. Butner, V. Parthasarathy, Amitava Bose
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 17:98-103
A novel nondestructive measurement technique is proposed to electrically monitor the depth of a trench etched in silicon for the purpose of process control in a manufacturing environment. A simple bipolar npn transistor can be constructed, the gain o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a45e2a03ec3d678cae50bea94c1a2822
https://doi.org/10.1109/tsm.2004.826936
https://doi.org/10.1109/tsm.2004.826936
Publikováno v:
IEEE Transactions on Electron Devices. 49:1049-1058
Thermal and electrical destruction of 55 V single and double reduced surface field (RESURF) lateral double-diffused MOSFETs (LDMOSFETs) in smart power ICs are investigated by experiments, simulations, and theoretical modeling. Static safe operating a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f2a4f9aaa7f398a6071e0bda467bcc1f
https://doi.org/10.1109/ted.2002.1003740
https://doi.org/10.1109/ted.2002.1003740
Publikováno v:
ISPSD '03. 2003 IEEE 15th International Symposium on Power Semiconductor Devices and ICs, 2003. Proceedings..
In this paper we present an evaluation of trade-off capability between high-side capability and minority carrier injection into substrate in smart power technologies. While high-side capability is easier to accomplish on lightly doped p-type substrat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5240a5077eecd95d72069cda13c02f4
https://doi.org/10.1109/ispsd.2003.1225273
https://doi.org/10.1109/ispsd.2003.1225273
Autor:
R. Zhu, V. Parthasarathy, V. Khemka, A. Bose, T. Roggenbauer, G. Lee, B. Baumert, P. Hui, P. Rodriguez, D. Collins
Publikováno v:
ISPSD '03. 2003 IEEE 15th International Symposium on Power Semiconductor Devices and ICs, 2003. Proceedings..
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9e54afda4198d0b7d7153d08060d8d7a
https://doi.org/10.1109/ispsd.2003.1225258
https://doi.org/10.1109/ispsd.2003.1225258
Autor:
Z. Wu, V. Parthasarathy, P. Hui, Ivan Puchades, D. Collins, T. Roggenbauer, P. Rodriquez, Amitava Bose, Vishnu K. Khemka, Ronghua Zhu, M. Butner, J. Nivison
Publikováno v:
Digest. International Electron Devices Meeting.
Presents a 0.25/spl mu/m CMOS based smart power platform on a P++ substrate with a deep trench high-voltage isolation as a low-cost alternative to SOI in realizing significant analog shrink, reduction of substrate parasitics and 70V high-side capabil
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::96d3e82494d28294eb793eb924545961
https://doi.org/10.1109/iedm.2002.1175878
https://doi.org/10.1109/iedm.2002.1175878
Publikováno v:
International Conference on Microelectronic Test Structures, 2003..
A novel, non-destructive measurement technique has been used to electrically monitor the depth of a deep trench in a submicron smart power process. The ratio of the injected emitter current to the captured collector current in a parasitic bipolar tra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::988cc1de044246543fa3a31ce61e9452
https://doi.org/10.1109/icmts.2003.1197363
https://doi.org/10.1109/icmts.2003.1197363
Publikováno v:
Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).
55 V high-side RESURF LDMOS has been integrated successfully in 0.35 /spl mu/m smart power technology by carefully arranging the lateral doping profile. This device has Rds.on/spl times/area of 0.55 m/spl Omega/.cm/sup 2/ with excellent safe operatin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf6d69b1478bd1efd7de217ea2401684
https://doi.org/10.1109/ispsd.2001.934639
https://doi.org/10.1109/ispsd.2001.934639
Conference
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Autor:
G. Lee, P. Hui, P. Rodriguez, Amitava Bose, Ronghua Zhu, D. Collins, Vishnu K. Khemka, B. Baumert, V. Parthasarathy, T. Roggenbauer
Publikováno v:
IEE Proceedings - Circuits, Devices and Systems. 151:198
In this paper simultaneous optimization of 4.5-5.5V N and PMOS devices, 20-30V NLDMOS and NPN and PNP bipolar devices in a 0.25 /spl mu/m Smart Power Technology for portable wireless and consumer applications is discussed. With the addition of two de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f7ba63bcf5b1ccbf746bfd1d30b79f1
https://doi.org/10.1049/ip-cds:20040456
https://doi.org/10.1049/ip-cds:20040456
Akademický článek
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