Zobrazeno 1 - 10
of 230
pro vyhledávání: '"T. Poiroux"'
Autor:
M. -A. Jaud, W. Vandendaele, B. Rrustemi, A. G. Viey, S. Martin, C. Le Royer, L. Vauche, S. Martinie, R. Gwoziecki, R. Modica, F. Iucolano, T. Poiroux
Publikováno v:
IEEE Transactions on Electron Devices. 69:669-674
COMPACT MODELING @ CEA-LETI Leti CEA Tech team is a developer of the CMC (Compact Model Coalition) for 2 SPICE models: standardization process, implementation in commercial IC simulators, strong interaction with users. * L-UTSOI compact model is dedi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::58b7bc40b4446c89b5fcca7209527eb7
Autor:
S. Martinie, O. Rozeau, HyoEun Park, Sungjoon Park, P. Scheer, S. El Ghouli, A. Juge, H. Lee, T. Poiroux
Publikováno v:
Solid-State Electronics. 199:108511
Autor:
B. Rrustemi, A. G. Viey, M.-A. Jaud, F. Triozon, W. Vandendaele, C. Leroux, J. Cluzel, S. Martin, C. Le Royer, R. Gwoziecki, R. Modica, F. Iucolano, F. Gaillard, T. Poiroux, G. Ghibaudo
Publikováno v:
ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference (ESSDERC).
Autor:
M. Vinet, P. Perreau, Oliver Faynot, T. Poiroux, Francois Andrieu, C. Fenouillet, L. Grenouillet, O. Weber, Simon Deleonibus
Publikováno v:
ECS Transactions. 58:3-8
This paper reports the technological details and the performance of the planar Fully Depleted SOI technology. Thanks to its intrinsic structure (SOI substrates, undoped channel, ultra-thin body and box thicknesses), FDSOI devices offer significant ad
Autor:
Michel Haond, Maud Vinet, Alain Aurand, V. Farys, E. Baylac, A. Claverie, E. Petitprez, Emmanuel Josse, Raphael Bingert, M-A. Jaud, T. Poiroux, E. Bechet, Jean-Claude Marin, Didier Dutartre, S. Delmedico, Olivier Weber, C. Bernicot, E. Bernard, P. Sardin, F Andrieu, S. Ortolland, Joris Lacord, E. Serret, R. Berthelon, Patrick Scheer, A. Pofelski, Pierre Perreau, Denis Rideau
Publikováno v:
VLSI Technology, 2016 IEEE Symposium on
VLSI Technology, 2016 IEEE Symposium on, 2016, Unknown, Unknown Region. ⟨10.1109/VLSIT.2016.7573425⟩
2016 IEEE Symposium on VLSI Technology
VLSI Technology, 2016 IEEE Symposium on, 2016, Unknown, Unknown Region. ⟨10.1109/VLSIT.2016.7573425⟩
2016 IEEE Symposium on VLSI Technology
cited By 4; International audience; We report on the main local layout effect in 14nm Ultra-Thin Buried oxide and Body Fully Depleted Silicon On Insulator (UTBB-FDSOI) CMOS technology [1]. This effect is demonstrated by Nano-Beam Diffraction to be di
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Publikováno v:
Microelectronic Engineering. 72:352-356
Transconductance measurements are performed on advanced fully depleted SOI MOSFETs and reveal a new floating-body effect. Gate tunneling current is responsible for the body charging and may lead to the onset of a strong second peak in front-gate tran
Autor:
Claire Mathieu, O. Renault, K. Kaja, A. M. Pascon, T. Poiroux, H. Rotella, P. Blaise, Leonardo R. C. Fonseca, Julien E. Rault, Nicholas Barrett
Publikováno v:
Journal of Physics D: Applied Physics
Journal of Physics D: Applied Physics, IOP Publishing, 2014, 47 (29), ⟨10.1088/0022-3727/47/29/295303⟩
Journal of Physics D: Applied Physics, 2014, 47 (29), pp.295303. ⟨10.1088/0022-3727/47/29/295303⟩
Journal of Physics D: Applied Physics, IOP Publishing, 2014, 47 (29), ⟨10.1088/0022-3727/47/29/295303⟩
Journal of Physics D: Applied Physics, 2014, 47 (29), pp.295303. ⟨10.1088/0022-3727/47/29/295303⟩
We report on the charge spill-out and work function of epitaxial few-layer graphene on 6H-SiC(0001). Experiments from high-resolution, energy-filtered X-ray photoelectron emission microscopy (XPEEM) are combined with ab initio Density Functional Theo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::53b8f7a4264e87c7123f69cd3e2a270f
https://hal-cea.archives-ouvertes.fr/cea-01376771
https://hal-cea.archives-ouvertes.fr/cea-01376771
Publikováno v:
2014 IEEE International Reliability Physics Symposium.
In this work we propose a circuit model to investigate the plasma induced damage on the FDSOI technology. The charging damages are simulated on nMOS and pMOS devices as a function of the plasma parameters and antenna characteristics. We demonstrate t